reset status
Peter Verkaik
Posts: 3,956
Hi,
I know it is possible to distinquish between a restart after watchdog timeout
and wakeup after sleep by looking at the PD and TO bits in the status
register.
Is there a way to distinquish between a power reset (applying power)
and a MCLR reset (manual reset)?
regards peter
·
I know it is possible to distinquish between a restart after watchdog timeout
and wakeup after sleep by looking at the PD and TO bits in the status
register.
Is there a way to distinquish between a power reset (applying power)
and a MCLR reset (manual reset)?
regards peter
·
Comments
http://www.parallax.com/dl/appnt/sx/An18Reset.pdf
From the looks of it you can detect that IF you are running but not if the SX is in sleep mode.
Bean.
I have come up with the following startup code to detect one of 6 possible
reset sources. This is based on the pseudo code in the document.
I also attached this for better reading.
Two global bank variables are used: temp which will hold the reset source
at the end, int_pending that OR's detected edges on port B. This allows
to service port B·interrupts across multiple isr cycles. Unused pins can be
easily masked out. It is full assembly, perhaps someone else cares to
convert this into SX/B.
Please comment on any possible error.
regards peter
;RESET VECTOR·Program execution begins here on power-up or after a reset
·;
reset_entry
·;Staus of TO, PD bits after reset
·;·· TO······· PD······ Reset Source
·;··· 1········ 1······ after power up reset
·;··· 1········ 0······ SX was on sleep and reset by MultiInput-WakeUp (MIWU)
·;··· 0········ 0······ SX was on sleep and reset by WatchDog Timer (WDT)
·;··· 0········ 1······ SX was on active mode and reset by WDT
·;··· 1········ 0······ SX was on sleep and reset by external reset pin (MCLR)
·;Unchanged Unchanged·· SX was on active mode and reset by external reset pin (MCLR)
·; Determination of reset source
·; How_Do_I_Got_Here ?
·; Six reasons could get me here:
RESET_MIWU·equ·5·; - a transition on the RB.WKPIN
RESET_MCLRPD·equ·4·; - a mclr reset while in sleep (power down) mode
RESET_MCLR·equ·3·; - a mclt reset while running
RESET_WDTWU·equ·2·; - a watchdog wakeup
RESET_WDTTO·equ·1·; - a watchdog timeout
RESET_PWRUP·equ·0·; - or someone turned on power
··mov·m,#$09···;select pending register
··clr·w
··mov·!rb,w···;clear pending register
··mov·temp,w···;· and save new detected edges
··or·int_pending,w··;remember pending interrupts
find_reset
··jnb·TO,:find3··; if (TO==1) {
··jb·PD,:find1··;·· if (PD==0) {
······;···· //PD=0 TO=1
··mov·w,temp···;···· if (WKPEND.WKPIN==1) { //rb.wkpin is the miwu pin
··and·w,~#RB_wken··;
··jz·:find0···;
··mov·w,#RESET_MIWU··;······ miwu();
··jmp·:find_done··;···· }
:find0······;···· else {
··mov·w,#RESET_PWRUP··;······ power_on(); // normal power_up
··jmp·:find_done··;···· }
······;·· }
:find1······;·· else {
······;···· //PD=1 TO=1
··mov·w,temp···;···· if (WKPEND.IND==0) { //rb.IND is a non miwu pin
··and·w,#RB_wken
··jnz·:find2
··mov·w,#RESET_MCLR··;······ mclr_during_exec();
··jmp·:find_done··;···· }
:find2······;···· else {
··mov·w,#RESET_PWRUP··;······ power_on(); // normal power_up
··jmp·:find_done··;···· }
······;·· }
······; }
:find3······; else {
··jb·PD,:find4··;·· if (PD==0) {
······;···· //PD=0 TO=0
··mov·w,#RESET_WDTWU··;···· wakeup_through_watchdog();
··jmp·:find_done··;·· }
:find4······;·· else {
······;···· //PD=1 TO=0
··mov·w,#RESET_WDTTO··;···· watchdog_timeout(); // clr !wdt more often
··jmp·:find_done··;·· }
······; }
:find_done
··mov·temp,w···;now temp holds reset source