Watchdog and reset
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Posts: 46,084
Claude-
Reset is effective at all times. It's a direct hardware path to the
underlying microprocessor reset logic.
END is essentially an untimed SLEEP. The nature of the
microprocessor's watchdog timer requires that it be always enabled or
always disabled. On Stamps, it's always enabled so that (among other
things) SLEEP can work, i.e. resume normal, full-power mode after a
specified duration. Therefore the watchdog timer is necessarily
active during an END condition as well.
STOP is available as an alternative to END. STOP does not put the
Stamp in low power (SLEEP) mode.
Your English is fine.
Regards,
Steve
Reset is effective at all times. It's a direct hardware path to the
underlying microprocessor reset logic.
END is essentially an untimed SLEEP. The nature of the
microprocessor's watchdog timer requires that it be always enabled or
always disabled. On Stamps, it's always enabled so that (among other
things) SLEEP can work, i.e. resume normal, full-power mode after a
specified duration. Therefore the watchdog timer is necessarily
active during an END condition as well.
STOP is available as an alternative to END. STOP does not put the
Stamp in low power (SLEEP) mode.
Your English is fine.
Regards,
Steve
Comments
Two questions about watchdog, reset, sleep and end instructions for a BS2 :
1 - When a BS2 is on low-power mode after an sleep or an end instruction,
watchdog is effective each 2.3 seconds, for 18ms. Is reset effective if it
occurs
during this 18 ms ?
2 - For sleep instruction I am understanding the need of a watchdog to
control the time. But after an end instruction ?
Claude
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