Multiple ic''s tied together
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Posts: 46,084
Hello,
To save on IO lines on my Stamp, I was thinking of tieing the cs and
clock lines together on identical A/D chips so only two lines are
needed to control all of them. The data line would go to it's own
separate IO port on the Stamp for each chip.
Is this right?
Thank you,
John
To save on IO lines on my Stamp, I was thinking of tieing the cs and
clock lines together on identical A/D chips so only two lines are
needed to control all of them. The data line would go to it's own
separate IO port on the Stamp for each chip.
Is this right?
Thank you,
John