Yet another SEROUT question

Archiver

Thanks for all your answers.

1. Allan, regarding Table 5.88 on pg. 304 of BS Manual, do you agree
that term "High Impedance state" is more suitable to describe the PIN
STATUS than "open" because "open" is used in a different context
(Table 5.81) to describe one of two MODES of baudmode?

This is the core of my confusion. The word "open" is used to
describe the STATE of a Stamp PIN on Table 5.88, then "open" is used
to describe one of two MODES (driven or open).

2. WHY is it that for Non-Inverted baudmode, resistor is tied to
Vdd, but for Inverted baudmode, resistor is tied to Vss?

I guess what I'm really asking here is: In Non-inverted open mode,
why does the BS2 drive LOW, but goes High Impedance for High?
Is this Basic Stamp specific or per industry-wide specification?

Similarly, why is it that for Inverted mode, BS2 drives HIGH, but
becomes high impedance for LOW?

Is this something arbitrary that Stamp developers decided when they
designed Stamps?

Archiver

The use of a pin in 'open' mode is VERY
Stamp specific. No vendor I've ever heard of
supports this sort of thing. On the other hand,
it's an elegant and simple solution.

I also can not understand their naming
convention for 'open' and 'invert' -- they
seem opposite to me -- but they do document
exactly what happens to the pin in the modes
they define, so it doesn't matter if I agree
with their naming -- I can use it.

1. Yes, I do agree that it looks like the
pin is put into high-impedance, to allow the
line to 'float' to another state.

2. 232 'NRZ' signaling sits at a 'marking' "1"
state most of the time. When it actually sends
a bit, it has a 'start' bit which goes LOW for
one 'bit-time', then sends the 8 data bits,
(LSB first) then goes HIGH for one bit time
as a 'stop' bit. It then 'marks' again. See
http://www.rentron.com/Myke7.htm
This has one of the best low-low level
232 NRZ explanations I've seen.

SO, in 'Open' 'Normal' mode, the resistor
pulls the line HIGH, while the pin is
set at high-impedance. When the SEROUT is
executed, the line is pulsed low for every 0,
and let float high for every 1. In this way,
another 232 pin on another stamp could
drive the pin also. They'd garble each
other's data, but no forcing of pin state
would result in damage.

'Invert' merely inverts the signaling here,
so the stamp 'marks' "1" at 0 volts (held by the
resistor) and sends "0" as a driven +5.

Myke's tutorial IS industry standard, so
that's why they did it the way they did.

Note again that when to float and when to
drive is NOT industry standard, that's
Parallax's clever way of implementing
a 232 multi-drop bus.


--- In basicstamps@yahoogroups.com, "yellowniter" <yellowniter@y...>
wrote:
> Thanks for all your answers.
>
> 1. Allan, regarding Table 5.88 on pg. 304 of BS Manual, do you
agree
> that term "High Impedance state" is more suitable to describe the
PIN
> STATUS than "open" because "open" is used in a different context
> (Table 5.81) to describe one of two MODES of baudmode?
>
> This is the core of my confusion. The word "open" is used to
> describe the STATE of a Stamp PIN on Table 5.88, then "open" is
used
> to describe one of two MODES (driven or open).
>
> 2. WHY is it that for Non-Inverted baudmode, resistor is tied to
> Vdd, but for Inverted baudmode, resistor is tied to Vss?
>
> I guess what I'm really asking here is: In Non-inverted open mode,
> why does the BS2 drive LOW, but goes High Impedance for High?
> Is this Basic Stamp specific or per industry-wide specification?
>
> Similarly, why is it that for Inverted mode, BS2 drives HIGH, but
> becomes high impedance for LOW?
>
> Is this something arbitrary that Stamp developers decided when they
> designed Stamps?