Analog Devices DDS
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I am attempting to interface a Analog Devices AD9850 DDS to a Basic Stamp 2,
with the stamp using perhaps thumbwheels or keypad for frequency input (w/BCD
readout). The part I haven't figured out yet is the Stamp program to generate
and assemble the tuning word for the DDS.
The formula is FREQ = (32_bit_tuning_word x Clock) / 2e32, where I wish to input
the variable FREQ, and then SHIFTOUT the assembled 32-bit word to the DDS after
appending 8 additional bits to the MSB for phase shift and control bits. This
40-bit word would then be sent.
As a reference, if I were to input the frequency of 10.7 MHz the tuning word
would be 459561501, with a clock of 100 MHz. The Binary number would be
00011011011001000101101000011101 to which I would append 8 more bits to the MSB
end.
Any ideas?
Sam. (Raw Newbie)
[noparse][[/noparse]Non-text portions of this message have been removed]
with the stamp using perhaps thumbwheels or keypad for frequency input (w/BCD
readout). The part I haven't figured out yet is the Stamp program to generate
and assemble the tuning word for the DDS.
The formula is FREQ = (32_bit_tuning_word x Clock) / 2e32, where I wish to input
the variable FREQ, and then SHIFTOUT the assembled 32-bit word to the DDS after
appending 8 additional bits to the MSB for phase shift and control bits. This
40-bit word would then be sent.
As a reference, if I were to input the frequency of 10.7 MHz the tuning word
would be 459561501, with a clock of 100 MHz. The Binary number would be
00011011011001000101101000011101 to which I would append 8 more bits to the MSB
end.
Any ideas?
Sam. (Raw Newbie)
[noparse][[/noparse]Non-text portions of this message have been removed]
Comments
>Stamp 2, with the stamp using perhaps thumbwheels or keypad for
>frequency input (w/BCD readout). The part I haven't figured out yet
>is the Stamp program to generate and assemble the tuning word for
>the DDS.
>
>The formula is FREQ = (32_bit_tuning_word x Clock) / 2e32, where I
>wish to input the variable FREQ, and then SHIFTOUT the assembled
>32-bit word to the DDS after appending 8 additional bits to the MSB
>for phase shift and control bits. This 40-bit word would then be
>sent.
>
>As a reference, if I were to input the frequency of 10.7 MHz the
>tuning word would be 459561501, with a clock of 100 MHz. The Binary
>number would be 00011011011001000101101000011101 to which I would
>append 8 more bits to the MSB end.
>
>Any ideas?
>
>Sam. (Raw Newbie)
The cleanest way to do that is via binary long division. The problem
can be rewritten as:
FREQ / Clock = 32_bit_tuning_word / 2^32
that is, you need to approximate the ratio on the left with a ratio
on the right, with 2^32 as its denominator. It is assumed that FREQ
< Clock, always. As follows...
clock VAR Word ' input value
freq VAR Word ' input value
dds1 VAR Word ' high 16 bits of tuning
dds0 VAR Word ' low 16 bits of tuning
J VAR Nib ' loop index
clock=10000 ' for 100.00 mhz
freq=1070 ' for 10.7mhz
'
binary division loop
for J=15 to 0 ' 16 bits of high word
clock=clock//freq<<1 ' remainder*2
dds1.bit0(J)=clock/freq ' next bit
next
for J=15 to 0 ' 16 bits of low word
clock=clock//freq<<1 ' remainder*2
dds0.bit0(J)=clock/freq ' next bit
next
'
debug bin16 dds1,bin16 dds0, cr
end
I think that should be the 32 bits you need, in dds1:dds0. There is
more explanation about this on my web site at
<http://www.emesystems.com/BS2math2.htm> and
<http://www.emesystems.com/BS2math6.htm>. If you need more starting
precision, i.e. 10.666667 mhz is your input frequency with that
precision required, then you might need to go to a full 32 x 32 bit
division. I just uploaded a routine for that to the URL,
<http://www.emesystems.com/programs/divide32x32.bpe>.
-- regards,
Tracy Allen
http://www.emesystems.com
> >I am attempting to interface a Analog Devices AD9850 DDS to a
Basic
> >Stamp 2, with the stamp using perhaps thumbwheels or keypad for
> >frequency input (w/BCD readout). The part I haven't figured out
yet
> >is the Stamp program to generate and assemble the tuning word for
> >the DDS.
> >
> >The formula is FREQ = (32_bit_tuning_word x Clock) / 2e32, where I
> >wish to input the variable FREQ, and then SHIFTOUT the assembled
> >32-bit word to the DDS after appending 8 additional bits to the
MSB
> >for phase shift and control bits. This 40-bit word would then be
> >sent.
> >
> >As a reference, if I were to input the frequency of 10.7 MHz the
> >tuning word would be 459561501, with a clock of 100 MHz. The
Binary
> >number would be 00011011011001000101101000011101 to which I would
> >append 8 more bits to the MSB end.
> >
> >Any ideas?
> >
> >Sam. (Raw Newbie)
>
> The cleanest way to do that is via binary long division. The
problem
> can be rewritten as:
> FREQ / Clock = 32_bit_tuning_word / 2^32
> that is, you need to approximate the ratio on the left with a ratio
> on the right, with 2^32 as its denominator. It is assumed that
FREQ
> < Clock, always. As follows...
>
> clock VAR Word ' input value
> freq VAR Word ' input value
> dds1 VAR Word ' high 16 bits of tuning
> dds0 VAR Word ' low 16 bits of tuning
> J VAR Nib ' loop index
>
> clock=10000 ' for 100.00 mhz
> freq=1070 ' for 10.7mhz
>
> '
binary division loop
> for J=15 to 0 ' 16 bits of high word
> clock=clock//freq<<1 ' remainder*2
> dds1.bit0(J)=clock/freq ' next bit
> next
> for J=15 to 0 ' 16 bits of low word
> clock=clock//freq<<1 ' remainder*2
> dds0.bit0(J)=clock/freq ' next bit
> next
> '
>
> debug bin16 dds1,bin16 dds0, cr
> end
>
>
> I think that should be the 32 bits you need, in dds1:dds0. There
is
> more explanation about this on my web site at
> <http://www.emesystems.com/BS2math2.htm> and
> <http://www.emesystems.com/BS2math6.htm>. If you need more
starting
> precision, i.e. 10.666667 mhz is your input frequency with that
> precision required, then you might need to go to a full 32 x 32 bit
> division. I just uploaded a routine for that to the URL,
> <http://www.emesystems.com/programs/divide32x32.bpe>.
>
> -- regards,
> Tracy Allen
> http://www.emesystems.com
Great input, thanks. This gives me a starting point for working up a
full-blown program to control input, phase shift, etc. If I get this
working properly, will post the results.
Thanks for quick input,
Sam. http://www.e-zuni.com
I checked back on my response to a message last week. You needed to
find the bit pattern for freq/clock, but the program I typed was
finding the inverse, clock/freq. Here is the corrected version. I
did try it on your example data (always good to have that!) and it
gives the correct 32 bit pattern. Except the least significant bit
in your example is rounded up. You can get that by carrying the
algorithm to one more bit and round up if the lsb is a one and down
if it is zero.
clock VAR Word ' input value
freq VAR Word ' input value
dds1 VAR Word ' high 16 bits of tuning
dds0 VAR Word ' low 16 bits of tuning
J VAR Nib ' loop index
clock=10000 ' for 100.00 mhz
freq=1070 ' for 10.70mhz
'
binary long division loop
for J=15 to 0 ' 16 bits of high word
freq=freq//clock<<1 ' remainder*2
dds1.bit0(J)=freq/clock ' next bit
next
for J=15 to 0 ' 16 bits of low word
freq=freq//clock<<1 ' remainder*2
dds0.bit0(J)=freq/clock ' next bit
next
'
debug bin16 dds1,bin16 dds0, cr
end
-- Tracy Allen
http://www.emesystems.com
> >I am attempting to interface a Analog Devices AD9850 DDS to a Basic
>>Stamp 2, with the stamp using perhaps thumbwheels or keypad for
>>frequency input (w/BCD readout). The part I haven't figured out yet
>>is the Stamp program to generate and assemble the tuning word for
>>the DDS.
>>
>>The formula is FREQ = (32_bit_tuning_word x Clock) / 2e32, where I
>>wish to input the variable FREQ, and then SHIFTOUT the assembled
>>32-bit word to the DDS after appending 8 additional bits to the MSB
>>for phase shift and control bits. This 40-bit word would then be
>>sent.
>>
>>As a reference, if I were to input the frequency of 10.7 MHz the
>>tuning word would be 459561501, with a clock of 100 MHz. The Binary
>>number would be 00011011011001000101101000011101 to which I would
>>append 8 more bits to the MSB end.
>>
>>Any ideas?
>>
>>Sam. (Raw Newbie)
>
>The cleanest way to do that is via binary long division. The problem
>can be rewritten as:
> FREQ / Clock = 32_bit_tuning_word / 2^32
>that is, you need to approximate the ratio on the left with a ratio
>on the right, with 2^32 as its denominator. It is assumed that FREQ
>< Clock, always. As follows...
>
>clock VAR Word ' input value
>freq VAR Word ' input value
>dds1 VAR Word ' high 16 bits of tuning
>dds0 VAR Word ' low 16 bits of tuning
>J VAR Nib ' loop index
>
> clock=10000 ' for 100.00 mhz
> freq=1070 ' for 10.7mhz
>
> '
binary division loop
> for J=15 to 0 ' 16 bits of high word
> clock=clock//freq<<1 ' remainder*2
> dds1.bit0(J)=clock/freq ' next bit
> next
> for J=15 to 0 ' 16 bits of low word
> clock=clock//freq<<1 ' remainder*2
> dds0.bit0(J)=clock/freq ' next bit
> next
> '
>
> debug bin16 dds1,bin16 dds0, cr
> end
>
>
>I think that should be the 32 bits you need, in dds1:dds0. There is
>more explanation about this on my web site at
><http://www.emesystems.com/BS2math2.htm> and
><http://www.emesystems.com/BS2math6.htm>. If you need more starting
>precision, i.e. 10.666667 mhz is your input frequency with that
>precision required, then you might need to go to a full 32 x 32 bit
>division. I just uploaded a routine for that to the URL,
><http://www.emesystems.com/programs/divide32x32.bpe>.
>
> -- regards,
> Tracy Allen
> http://www.emesystems.com
>
>
>
>
>
>
>
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