help implementing buffered serial port

Archiver

Greetings,

Someone recently remarked that the BS2 family of chips didn't have
buffered serial ports (true) but implementation of buffered serial
ports is easy. Ok, how easy is it? Do I need some sort of FIFO/buffer
chip? Has anyone actually did this? I didnt see it in the archives.

I am currently using two BS2 chips in this particular project, one to
run things (a BS2P with 3 '595 chips attached) and one to watch the
serial port(a BS2) because the we dont want the customer to keep
retyping commands if the chip is busy. The customer is running
9600,8N1 - no flow control btw, so xon/xoff and RTS/DTR is out of the
picture.

Would like to save the cost of the second Stamp chip if I can. Any
help would be greatly appreciated.

Thanks in advance,
Paul

Archiver

apparently this was answered in message 28709. Id didn't get posted
to My email for some reason. another Yahoo glitch. sorry to bother
you all.

--- In basicstamps@yahoogroups.com, "Paul" <prcoy@y...> wrote:
> Greetings,
>
> Someone recently remarked that the BS2 family of chips didn't have
> buffered serial ports (true) but implementation of buffered serial
> ports is easy. Ok, how easy is it? Do I need some sort of
FIFO/buffer
> chip? Has anyone actually did this? I didnt see it in the archives.
>
> I am currently using two BS2 chips in this particular project, one
to
> run things (a BS2P with 3 '595 chips attached) and one to watch the
> serial port(a BS2) because the we dont want the customer to keep
> retyping commands if the chip is busy. The customer is running
> 9600,8N1 - no flow control btw, so xon/xoff and RTS/DTR is out of
the
> picture.
>
> Would like to save the cost of the second Stamp chip if I can. Any
> help would be greatly appreciated.
>
> Thanks in advance,
> Paul