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SPI Connections

ArchiverArchiver Posts: 46,084
edited 2002-04-23 03:10 in General Discussion
Hello,

I'm making a prototype board to hold a DS1302 clock and a Xicor 8kb EEPROM chip
(using the appkit info on the parallax web site) and I'm wondering if, since
both the DS1302 and EEPROM use the SPI interphase, if it is possible to share
any of the data lines?

It seems that the clock pins might be able to be shared, and even the data pins,
leaving only the CS (attention) pins dedicted to their own stamp pins.

On another note, instead of using an EEPROM, a RAM chip might give more
flexibility and speed. Since the DS1302 will have a back up watch battery
powering it when main power is off, a RAM or SRAM chip could use the same back
up battery to retain it's information when main power is off. Does anyone know
of a RAM or SRAM chip that is easy to interphase with that would work?

Thank you,
Stewart

Comments

  • ArchiverArchiver Posts: 46,084
    edited 2002-04-22 19:16
    At 11:20 AM 4/22/2002 -0500, you wrote:
    >Hello,
    >
    >I'm making a prototype board to hold a DS1302 clock and a Xicor 8kb EEPROM
    >chip (using the appkit info on the parallax web site) and I'm wondering
    >if, since both the DS1302 and EEPROM use the SPI interphase, if it is
    >possible to share any of the data lines?
    >
    >It seems that the clock pins might be able to be shared, and even the data
    >pins, leaving only the CS (attention) pins dedicted to their own stamp pins.
    >
    >On another note, instead of using an EEPROM, a RAM chip might give more
    >flexibility and speed. Since the DS1302 will have a back up watch battery
    >powering it when main power is off, a RAM or SRAM chip could use the same
    >back up battery to retain it's information when main power is off. Does
    >anyone know of a RAM or SRAM chip that is easy to interphase with that
    >would work?
    >
    >Thank you,
    > Stewart
    Hi Stewart-

    There is a similar product to what you are attempting to construct here:
    http://www.high-techgarage.com/products/timekeeper.php

    That may be of interest to you, or you may get some ideas from it.

    Regards,

    Bruce Bates
  • ArchiverArchiver Posts: 46,084
    edited 2002-04-23 03:10
    Stewart -

    You are on the right track. To use N SPI or Microwire
    chips, you only need N+2 stamp pins. Some implement
    them with unique CS pins while sharing clock and data.
    I prefer using unique data lines myself, it just feels
    more logical.

    Some time ago I toyed with an interesting concept. It
    should be possible to address N SPI devices with 3 *
    N^(1/3) pins - for example, 6 pins, 8 chips; 15 pins,
    125 chips.

    The availability of 2-wire addressable chips like
    Dallas Semi "1-Wire" and a similar line from Philips,
    which allow addressing a hundred or so chips, limits
    the likelihood that this concept would be particularly
    useful.

    Regards

    Bob Pence

    --- Stewart Mayer <stewlist@k...> wrote:
    > Hello,
    >
    > I'm making a prototype board to hold a DS1302 clock
    > and a Xicor 8kb EEPROM chip (using the appkit info
    > on the parallax web site) and I'm wondering if,
    > since both the DS1302 and EEPROM use the SPI
    > interphase, if it is possible to share any of the
    > data lines?
    >
    > It seems that the clock pins might be able to be
    > shared, and even the data pins, leaving only the CS
    > (attention) pins dedicted to their own stamp pins.
    >
    > On another note, instead of using an EEPROM, a RAM
    > chip might give more flexibility and speed. Since
    > the DS1302 will have a back up watch battery
    > powering it when main power is off, a RAM or SRAM
    > chip could use the same back up battery to retain
    > it's information when main power is off. Does
    > anyone know of a RAM or SRAM chip that is easy to
    > interphase with that would work?
    >
    > Thank you,
    > Stewart
    >
    >
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