Is my stamp broken? (weird latch thing)
I have a *really* weird problem.
I'm using a BS2 and an octal latch (74hct373) in my circuit. The octal
latch , if you're not familiar with it, basically 'copies' the pin state
of eight pins (inputs D0-D7), using them to set 8 internal registers which
get reset when you toggle a 'latch enable' pin. THe outputs are on Q0-Q7.
For this test, I'm running a very simple program, which basically in a
loop sets pins 0-7 to be 'low' , pauses and repeats. (Don't ask why, but
just be assured that pins 0-7 are set low, at least from the stamp's
perspective.
This is what happens on a test of input Q0 and output D0:
D0 is tied directly to +5 -> When latching occurs, Q0 is high
D0 is tied directly to gnd -> when latching occurs, Q0 is low
(this is all as expected, now it gets weird...)
D0 is tied to stamp pin 0 -> When latching occurs, Q0 is ALWAYS high,
regardless of the state of pin 0.
D0 is tied to stamp pin 1 -> when latching occurs, Q0 follows pin 1.
D0 is tied to st amp pin 2 -> Same behavior as pin 0
D0 is tied to stamp pin 3 -> same as 1 (expected behavior)
Basically , pins 0 and 2 "fool" the latch into thinking it's high,
regardless of the pin state. When I measure the amperage and voltage, both
are zero (Admittedly, I have very rudimentary measuring devices)
Does anyone have any idea what's going on? Should I get a new stamp?
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson
I'm using a BS2 and an octal latch (74hct373) in my circuit. The octal
latch , if you're not familiar with it, basically 'copies' the pin state
of eight pins (inputs D0-D7), using them to set 8 internal registers which
get reset when you toggle a 'latch enable' pin. THe outputs are on Q0-Q7.
For this test, I'm running a very simple program, which basically in a
loop sets pins 0-7 to be 'low' , pauses and repeats. (Don't ask why, but
just be assured that pins 0-7 are set low, at least from the stamp's
perspective.
This is what happens on a test of input Q0 and output D0:
D0 is tied directly to +5 -> When latching occurs, Q0 is high
D0 is tied directly to gnd -> when latching occurs, Q0 is low
(this is all as expected, now it gets weird...)
D0 is tied to stamp pin 0 -> When latching occurs, Q0 is ALWAYS high,
regardless of the state of pin 0.
D0 is tied to stamp pin 1 -> when latching occurs, Q0 follows pin 1.
D0 is tied to st amp pin 2 -> Same behavior as pin 0
D0 is tied to stamp pin 3 -> same as 1 (expected behavior)
Basically , pins 0 and 2 "fool" the latch into thinking it's high,
regardless of the pin state. When I measure the amperage and voltage, both
are zero (Admittedly, I have very rudimentary measuring devices)
Does anyone have any idea what's going on? Should I get a new stamp?
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson
Comments
Before you assume you have a bad Stamp, you should be sure you don't have
marginal timing. The latch input needs to be present for a minimum time
called the setup time, before you read into the latch with latch enable.
Also, make sure the input (from the Stamp) is not changing during latch
enable. As you probably know, you can monitor the Stamp pins with ~ 390
ohms in series with an LED, to make sure the Stamp is doing what you expect.
Good luck,
Ray McArthur
> I have a *really* weird problem.
>
> I'm using a BS2 and an octal latch (74hct373) in my circuit. The octal
> latch , if you're not familiar with it, basically 'copies' the pin state
> of eight pins (inputs D0-D7), using them to set 8 internal registers which
> get reset when you toggle a 'latch enable' pin. THe outputs are on Q0-Q7.
>
> For this test, I'm running a very simple program, which basically in a
> loop sets pins 0-7 to be 'low' , pauses and repeats. (Don't ask why, but
> just be assured that pins 0-7 are set low, at least from the stamp's
> perspective.
>
> This is what happens on a test of input Q0 and output D0:
>
> D0 is tied directly to +5 -> When latching occurs, Q0 is high
> D0 is tied directly to gnd -> when latching occurs, Q0 is low
>
> (this is all as expected, now it gets weird...)
>
> D0 is tied to stamp pin 0 -> When latching occurs, Q0 is ALWAYS high,
> regardless of the state of pin 0.
>
> D0 is tied to stamp pin 1 -> when latching occurs, Q0 follows pin 1.
> D0 is tied to st amp pin 2 -> Same behavior as pin 0
> D0 is tied to stamp pin 3 -> same as 1 (expected behavior)
>
> Basically , pins 0 and 2 "fool" the latch into thinking it's high,
> regardless of the pin state. When I measure the amperage and voltage, both
> are zero (Admittedly, I have very rudimentary measuring devices)
>
> Does anyone have any idea what's going on? Should I get a new stamp?
> Sean:
>
> Before you assume you have a bad Stamp, you should be sure you don't have
> marginal timing. The latch input needs to be present for a minimum time
> called the setup time, before you read into the latch with latch enable.
Wow, I didn't see that in the 373 spec. Thanks. I don't think it's that,
though, because this is a constant-on situation.
> Also, make sure the input (from the Stamp) is not changing during latch
> enable. As you probably know, you can monitor the Stamp pins with ~ 390
> ohms in series with an LED, to make sure the Stamp is doing what you expect.
I have been monitoring both with LED's and a volt meter. Again, the
fundamental problem seems to be that the latch sees what seems to be 0V as
'high', and thus latches to it. But only on pins 0 and 2, the rest work
fine.
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson
How about writing a simple program to blink an LED from a Stamp pin? First
try it so the LED lights when a pin is low, then with an LED lighting when a
pin is high. Try it for pin 0, then pin 1, etc. This will test the ability
of each pin to source and sink current. If pin 0 & 2 flunk this test, you
have Stamp problems.
I hope it passes,
Ray McArthur
> I have been monitoring both with LED's and a volt meter. Again, the
> fundamental problem seems to be that the latch sees what seems to be 0V as
> 'high', and thus latches to it. But only on pins 0 and 2, the rest work
> fine.
> Sean, another idea:
>
> How about writing a simple program to blink an LED from a Stamp pin? First
> try it so the LED lights when a pin is low, then with an LED lighting when a
> pin is high. Try it for pin 0, then pin 1, etc. This will test the ability
> of each pin to source and sink current. If pin 0 & 2 flunk this test, you
> have Stamp problems.
It blinks Ok, it just fails to go 'low' enough to not trigger the latch.c
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson
If pins 0 and 2 don't go as low as the other pins with the same load, you
have a Stamp problem.
Ray McArthur
> It blinks Ok, it just fails to go 'low' enough to not trigger the latch.
> Hi Sean:
>
> If pins 0 and 2 don't go as low as the other pins with the same load, you
> have a Stamp problem.
Thanks. This is in fact the case. I'm going to do some more tests and then
contact parallax.
Sean T. Lamont, CTO / Chief NetNerd, Abstract Software, Inc. (ServNet)
Seattle - Bellingham - Vancouver - Portland - Everett - Tacoma - Bremerton
email: lamont@a... WWW: http://www.serv.net
"...There's no moral, it's just a lot of stuff that happens". - H. Simpson