Technique for Reading External State
Harry Stoner
Posts: 54
I have a working solution with a BS2 currently that continually outputs on i/o pins based on 32 bits of state info. The state info is read via serial i/o from another stamp. State data is stored in RAM. State is updated randomly maybe a couple of times per second or less.
The time to process the serial i/o is problematic. 5-10ms on the wire then another 5ms or so to store it. Just thinking in the future for the next time I do this. Conceptually, I am thinking about a latch chip that stamp A can clock and put state data into, while stamp B continually reads the state out of the latch. It doesn't matter if some bits of state change and are read "dirty". Perhaps 4 latch chips needed for 32 bits of state.
Can someone point me to chips and/or techniques to do this? Stamp B would have to be able to pull out the 32 bits of state quickly . The idea is to eliminate the serial i/o and replace it with new code that would be (hopefully) faster, so that the 10-15ms of time is greatly reduced. I guess ideally I would like to be able to read the 32 bits of state into RAM in 2 or 3 ms or less.
And to make it harder, I would like to not have to use a lot of i/o pins to read this state, and be able to possibly extend the solution to work for 64 bits of state or even 128 bits max.
Thanks a lot.
Harry
The time to process the serial i/o is problematic. 5-10ms on the wire then another 5ms or so to store it. Just thinking in the future for the next time I do this. Conceptually, I am thinking about a latch chip that stamp A can clock and put state data into, while stamp B continually reads the state out of the latch. It doesn't matter if some bits of state change and are read "dirty". Perhaps 4 latch chips needed for 32 bits of state.
Can someone point me to chips and/or techniques to do this? Stamp B would have to be able to pull out the 32 bits of state quickly . The idea is to eliminate the serial i/o and replace it with new code that would be (hopefully) faster, so that the 10-15ms of time is greatly reduced. I guess ideally I would like to be able to read the 32 bits of state into RAM in 2 or 3 ms or less.
And to make it harder, I would like to not have to use a lot of i/o pins to read this state, and be able to possibly extend the solution to work for 64 bits of state or even 128 bits max.
Thanks a lot.
Harry
Comments
IS the BAUDRATE really the bottleneck in your application ??
If you have 32 bit at 9600 BAUD (==bit per second) then the transfer time would be about 3.5ms. There must be something 'eating' speed if my estimate is right. Are you writing data to the EEPROM?, that can be time consuming !!
To my opinion you could try the lollowing:
-a higher boaudrate
-handshaking so there is less time waisted in the receiving Stamp
-SHIFTIN/SHIFTOUT could be something for you
Interesting project, what do you use it for ?
Klaus
Does Stamp A have to do something after it collects the data or can it simply "wait-around" for Stamp B to signal that it is ready to receive ?
Terry
The sending stamp has other jobs and while it can wait around, it's best if everythjing is decoupled. What I want do is try and see if in the future I can reduce that 5ms + processing time (say 8-10ms total) and get it down to 1 - 3 ms.
This would make a visible difference in the lamp strobing. There is no flicker when strobing except when new state data is received.
Even if I could use a higher baud rate the other time spent processing the data is still there. Just looking to see if there is something faster using a different technique.
Thanks again.
Harry
You could consider using a BS2p as Stamp 2.
It is much faster than the BS2 and it supports polling pins. It is in fact 'looking' at the state of a specified pin between each instruction it processes. If a preprogrammed condition occurs it will take some preprogrammed action which will speed up things even more !!
Have a look at the specs of the BS2p.
Regards,
Klaus
Harry