quadrature decoding
frdchang
Posts: 14
hello,
i was wondering what the bandwidth of a 100mhz sx chip would be if i sampled a quadrature decoding...
i am not yet familiar with the virtual peripherals concept yet, but i am·guessing that·if i am using speedy motors that are at 512 count/ rev i will exceed the bandwidth of the sx chip?
(i need to have a feedback control loop running every 1ms as well)
if this was implemented as a virtual peripheral, would it interrupt at every increment?· how would it work?
(the interrupts would overwhelm the cpu since the motors are at such high resolution)
thanks,
fred
i was wondering what the bandwidth of a 100mhz sx chip would be if i sampled a quadrature decoding...
i am not yet familiar with the virtual peripherals concept yet, but i am·guessing that·if i am using speedy motors that are at 512 count/ rev i will exceed the bandwidth of the sx chip?
(i need to have a feedback control loop running every 1ms as well)
if this was implemented as a virtual peripheral, would it interrupt at every increment?· how would it work?
(the interrupts would overwhelm the cpu since the motors are at such high resolution)
thanks,
fred
Comments
To better answer your question, do you know the maximum revs/sec?
The 1 ms feedback loop would not be a problem, even with the SX running at 50 MHz,·there are 50,000 sx clock cycles in 1 ms.
I routinely have interrupts rates of 250 Khz, which is a mighty fast interrupt rate for any CPU. The 50 MHz SX handles this sort of thing without batting an eye or missing a beat. A 250 KHz interrupt rate consists of 200 SX clock cycles at 50 MHz. You need to allow for a few clock cycles for the interrupt handler (as well as allow the non-interrupt code to have some), but you can easily use 100 clock cycles in the interrupt handler and everybody will be happy.
At 512 counts per rev, you can run the motor up to 29296.875 RPM. My guess is you'll do just fine.
Thanks,
PeterM