OUTA: Timing question

ErNa · 2026-02-13 22:20

I'm running a P2 at 200 MHz. I'm writing Bit 0 to 7 using OUTA.
I observe, that not all bits switch at the same time.

Something, I didn't expect. Is it a bug or a feature?

I did no further tests yet, as it came as a surprise. But I create a sync-pulse

if_z        Or      outA,      #%1000_0000    'Trigger setzen              

        AND      OutBits,      #%0011_1111    '  Reset Trigger
        mov      outA,      OutBits

The sync pulse is as short, as it should be.
I think, I could have done it ANDing the bits directly, but didn't care then

Wuerfel_21 · 2026-02-13 22:29

a) post your code. It certainly shouldn't take on the order of microseconds(?) to switch the pins

b) generally there is some nanosecond-level difference in propagation delay between pins. You can use the P_SYNC_IO mode to reduce the difference, but now everything is delayed by a full clock cycle.

ErNa · 2026-02-13 22:48

Main: 
        mov      dirA,      dirA_Sel              ' sets direction of portB pins

Subroutine
Transition  'Start Transition
        mov      OutBits,   PattCurr          ' output pattern
        and      OutBits,   dirA_sel           ' isolate relevant bits
        mov      outA,      OutBits
        mov      TimeCT3,   TimeCT2
Transition_ret ret           ' return from subroutine

I output bit 0..7, dirA_sel masks the relevant bits
The timer is redundant
I do not use (to my knowledge) any smart-pin function for this I/O,
but have some ADC and a DAC running.

Where can I find info related to P_SYNC_IO?

Wuerfel_21 · 2026-02-14 00:06

Hmm, that code looks alright - are you sure you are measuring it right? Or am I mis-reading the scope claiming a 70us view duration?

P_SYNC_IO (also known as "registered I/O") is a flag you set with WRPIN. This just adds an extra latch into the signal chain, very close to the actual output drivers.
You would e.g. wrpin ##P_SYNC_IO,#0 addpins 7 to enable it for pins 0 through 7

OUTA: Timing question

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