@Tubular said:
Just had some real progress using the 100 watt resistor to preheat the whole thing to around 150 C, then its easy to work on the top and clear the bridges.
Awesome. I suspected there was still a chance you could do something to get the bridges removed. In the past I once spent what seemed like hours cleaning up a heavily bridged 80 way 0.5mm pitch Samtec connector (a real nightmare to wick the solder between the pins) and yet it finally worked in the end. Hopefully the P2 chip is still okay, with any luck your 150C isn't too much sustained heat for the P2 if the iron is just on the pins for a short moment to heat higher for melting the solder to remove it.
Having access to a Zephyrtronics ( https://zeph.com/airbathseries.htm )heat bath and air pencil would possibly be usefull for problems with bridging on this type of board. But they are kinda pricey. Be carefull of ones found on ebay, some repairs as with the air pen almost justify going new.
Here's the first pass results of max frequency vs VDD, all the way up to the abs max of 2.2v
Note for all these Vio was at 3.45V, which is max in its range according to datasheet
Vio(V) Vdd(V) Max Freq (MHz)
3.45 1.725 309
3.45 1.8 326 (nominal operating point is a little underwhelming)
3.45 1.9 349
3.45 2.0 368
3.45 2.1 387
3.45 2.2 405 (abs max Vdd according to datasheet)
Pretty happy getting to 405 MHz, even if 'nominal' was a bit under, but there are many compromises with this single sided arrangement. After some reflection I think I could do a bit better getting caps closer and wider power delivery traces, but I'm not sure it really matters much
This really is such an interesting board layout. If it works out nicely thermally I can imagine it would help those people not so confident in laying out complex P2 boards with multiple layers to just use a similar design in order to keep the routing really simple around the P2, especially if they already wanted a fan to be fitted above the P2 anyway given that this "power distribution" board solves that problem too.
Thinking about this it could potentially make a very good/cheap P2 kit if the base board was already loaded with a P2, regs, xtal, flash and the SMD bypass caps and the top board was supplied loose and the customer could solder on their own through hole pin header connectors and connect it up themselves. Or you could even provide different regulator options available as variants of the top board (eg. switcher or LDOs etc) for different power requirements.
@rogloh said:
This really is such an interesting board layout. If it works out nicely thermally I can imagine it would help those people not so confident in laying out complex P2 boards with multiple layers to just use a similar design in order to keep the routing really simple around the P2, especially if they already wanted a fan to be fitted above the P2 anyway given that this "power distribution" board solves that problem too.
Thinking about this it could potentially make a very good/cheap P2 kit if the base board was already loaded with a P2, regs, xtal, flash and the SMD bypass caps and the top board was supplied loose and the customer could solder on their own through hole pin header connectors and connect it up themselves. Or you could even provide different regulator options available as variants of the top board (eg. switcher or LDOs etc) for different power requirements.
I've been giving it all a lot of thought today as I move through some experiments. I agree with adding the flash and fixing the short, but I'm thinking more about what can be done about the top bridging board. Because its really just 3 concentric rings, I'm thinking of making a version of it in metal, using the same style of SMD 0.1" headers (but female). I'm also thinking of using an 'internal' 25mm or 20mm fan that can sit inside the existing connectors.
You'd end up with something looking pretty 'Cyberman', but wouldn't be more expensive or complicated to make. It could have really good EMC protection!
If I do this I'll be looking for those neat reverse mount leds you found to indicate power status
@Tubular said:
Just had some real progress using the 100 watt resistor to preheat the whole thing to around 150 C, then its easy to work on the top and clear the bridges.
I use AL substrate quite regularly for my power electronics. To desolder components just pre-heat it 50 to 30°C below the melting point of the solder alloy. I use a regular cooking plate for this. Just set it to a low power setting and check the temperature with an IR thermometer.
@Rayman said:
@Tubular Interesting results... Think regular boards can get to higher freq by increasing Vdd like that?
What are you doing for a test? Just seeing if serial works?
The code is just
repeat
pinhigh(2)
pinlow(2)
however the 'test' is whether the loader can take it in and run it, so involves serial. Its a sharp transition, it either runs or it doesn't, no '50/50 chance' or so it seems.
Its true that once the code is inserted, its possible to go up higher in frequency. I think I caught your itch Rayman, because I'm curious about getting its max freq higher, and worked on a 'v2' last night. That version 2 brings the caps in nice and tight, and uses 32 0805 0R resistors to form a solid ground ring
I'm sure regular boards would also see benefit from tweaking Vdd
@Tubular said:
Just had some real progress using the 100 watt resistor to preheat the whole thing to around 150 C, then its easy to work on the top and clear the bridges.
I use AL substrate quite regularly for my power electronics. To desolder components just pre-heat it 50 to 30°C below the melting point of the solder alloy. I use a regular cooking plate for this. Just set it to a low power setting and check the temperature with an IR thermometer.
Thats pretty much exactly where I stumbled to, and was amazed how easy it was once there, compared to earlier. Excellent advice
I think the Eval board has a header for putting in your old Vdd. At least that's what it looks like...
Did anybody ever play with that?
Maybe can't tell with eval board because it already goes very high...
If 2.2 V is within spec, might have to try that out.
Now thinking should have made both of switching regulars the variable output type...
I don't know how reliable the 2.2V might be, although I hope to get a feel for it through these experiments. Its amazing that it gets an additional 80 MHz beyond nominal operating conditions 3.3/1.8v, at least it seems that way. Should run something more substantial to test the various pathways more thoroughly
@"Beau Schwabe" Says there's a hard stop at 350 MHz and looks to know what he's talking about. But, maybe that is temperature dependent? I know the chip can do some things faster than this...
Or, maybe some chips can and some can't at that point and you can't rely on it for production? Would like to know more about that...
Here's the next version that will do away with the above distribution board altogether, I hope.
I've used 32, 0R 0805 resistors to form a ground ring, skipping over the escaping i/o tracks. Its compromised again, but in different ways to the first board. I'm curious how this one goes in comparison
Vio(V) Vdd(V) Max Freq (MHz)
3.45 1.725 309
3.45 1.8 326 (nominal operating point is a little underwhelming)
3.45 1.9 349
3.45 2.0 368
3.45 2.1 387
3.45 2.2 405 (abs max Vdd according to datasheet)
I just change the _clkfreq = fff_000_000 line in the spin2 code and hit F10, it either 'takes' or it doesn't.
If it doesn't, then the output pin (P2) fails to toggle, so you get '0' on the frequency counter. There's still a fair bit of Vdd current consumed, so something is going on inside, but something has corrupted in there somewhere
As I've said a number of times in different places, hubRAM accesses fail when running at the PLL self-limit. You have to do everything running from cogRAM to make it reliable once the target clock frequency has been set. Which means you have to explicitly set sysclock in the test code. Leave _CLKFREQ at 100 MHz or similar.
Found the old test code. It's pure pasm2. Compile "unstable" with flexspin and it pulls in the ancient init routines I wrote before spin2 existed. It defaults to terminal baud of 230400.
Good to see your thermistor is much closer to the P2 and you could squeeze in flash. I was wondering if that was going to be possible with no vias. You must have got creative with the routing. Having nearby passives to snake traces though often helps.
Yep the flash wasn't as bad as expected, had to narrow the SOIC-8 pads down towards the actual pin width so they'd allow two tracks in between each set of pads, but once that was done things came together ok. A few more 0 ohm jumpers... but it got there.
Other additions include the power led, and the USB-C connectors in the corner. I didn't have time to attempt routing the D+ and D- data lines, so they are just brought to pads nearby, in case we want to run Saucy's USB CDC or UVC or similar. Because I only have a single layer, I can't connect both the D+ on A row of pads to the D+ on B row, and D- (crossover) similarly, like you normally would. Maybe it will be fussy about the USB-C cable orientation, or maybe they do the same in the connector, I don't know. We'll find out.
While cleaning out some old boxes I found this Hammond Octagonal diecast box. Turns out its a good match for this board, for an 'all aluminum' solution. Mouser sell these in all kinds of powder coated colors. Part number is 1590STPC*
Here's a pic of the version 1 board with its corners sanded back enough until it fit down the bottom of the tapered diecast box. The version 2 board has these dimensions deliberately, so should fit snugly
Oh wow! The entire case is the heatsink now if it sits flat enough. Or layer a thin film of heat transfer compound between the two to fill any voids and all that heat just wicks away! You'll probably not even need a fan. Overclocking fun.
@evanh said:
Found the old test code. It's pure pasm2. Compile "unstable" with flexspin and it pulls in the ancient init routines I wrote before spin2 existed. It defaults to terminal baud of 230400.
Thanks for posting this, evanh
The "answer" is... 442 MHz and a quarter can of freeze spray
Comments
Awesome. I suspected there was still a chance you could do something to get the bridges removed. In the past I once spent what seemed like hours cleaning up a heavily bridged 80 way 0.5mm pitch Samtec connector (a real nightmare to wick the solder between the pins) and yet it finally worked in the end. Hopefully the P2 chip is still okay, with any luck your 150C isn't too much sustained heat for the P2 if the iron is just on the pins for a short moment to heat higher for melting the solder to remove it.
Having access to a Zephyrtronics ( https://zeph.com/airbathseries.htm )heat bath and air pencil would possibly be usefull for problems with bridging on this type of board. But they are kinda pricey. Be carefull of ones found on ebay, some repairs as with the air pen almost justify going new.
Here's a photo I promised of the 100 watt resistor, that has largely saved this board... it'll later be used for board temperature testing
Oh and @ke4pjw guess what I found cleaning out the garage at the weekend - some never used, 2014 vintage Chipquik I hadn't yet used!
Here's a photo of the desktop test setup with voltage rails connected.
I normally follow ATX style wire colors for power wires, but not sure what 1v8 should be. Going with brown for now!
Here's the first pass results of max frequency vs VDD, all the way up to the abs max of 2.2v
Note for all these Vio was at 3.45V, which is max in its range according to datasheet
Pretty happy getting to 405 MHz, even if 'nominal' was a bit under, but there are many compromises with this single sided arrangement. After some reflection I think I could do a bit better getting caps closer and wider power delivery traces, but I'm not sure it really matters much
This really is such an interesting board layout. If it works out nicely thermally I can imagine it would help those people not so confident in laying out complex P2 boards with multiple layers to just use a similar design in order to keep the routing really simple around the P2, especially if they already wanted a fan to be fitted above the P2 anyway given that this "power distribution" board solves that problem too.
Thinking about this it could potentially make a very good/cheap P2 kit if the base board was already loaded with a P2, regs, xtal, flash and the SMD bypass caps and the top board was supplied loose and the customer could solder on their own through hole pin header connectors and connect it up themselves. Or you could even provide different regulator options available as variants of the top board (eg. switcher or LDOs etc) for different power requirements.
I've been giving it all a lot of thought today as I move through some experiments. I agree with adding the flash and fixing the short, but I'm thinking more about what can be done about the top bridging board. Because its really just 3 concentric rings, I'm thinking of making a version of it in metal, using the same style of SMD 0.1" headers (but female). I'm also thinking of using an 'internal' 25mm or 20mm fan that can sit inside the existing connectors.
You'd end up with something looking pretty 'Cyberman', but wouldn't be more expensive or complicated to make. It could have really good EMC protection!
If I do this I'll be looking for those neat reverse mount leds you found to indicate power status
Yeah that'd fit the look nicely. One for each corner could look cool. RX/TX/3.3V/1.8V etc.
EDIT: here's the link to the LEDs.
https://forums.parallax.com/discussion/comment/1545088/#Comment_1545088
@Tubular Interesting results... Think regular boards can get to higher freq by increasing Vdd like that?
What are you doing for a test? Just seeing if serial works?
I use AL substrate quite regularly for my power electronics. To desolder components just pre-heat it 50 to 30°C below the melting point of the solder alloy. I use a regular cooking plate for this. Just set it to a low power setting and check the temperature with an IR thermometer.
The code is just
however the 'test' is whether the loader can take it in and run it, so involves serial. Its a sharp transition, it either runs or it doesn't, no '50/50 chance' or so it seems.
Its true that once the code is inserted, its possible to go up higher in frequency. I think I caught your itch Rayman, because I'm curious about getting its max freq higher, and worked on a 'v2' last night. That version 2 brings the caps in nice and tight, and uses 32 0805 0R resistors to form a solid ground ring
I'm sure regular boards would also see benefit from tweaking Vdd
Thats pretty much exactly where I stumbled to, and was amazed how easy it was once there, compared to earlier. Excellent advice
I think the Eval board has a header for putting in your old Vdd. At least that's what it looks like...
Did anybody ever play with that?
Maybe can't tell with eval board because it already goes very high...
If 2.2 V is within spec, might have to try that out.
Now thinking should have made both of switching regulars the variable output type...
I don't know how reliable the 2.2V might be, although I hope to get a feel for it through these experiments. Its amazing that it gets an additional 80 MHz beyond nominal operating conditions 3.3/1.8v, at least it seems that way. Should run something more substantial to test the various pathways more thoroughly
I could settle for 368 MHz at 2.0 V
@"Beau Schwabe" Says there's a hard stop at 350 MHz and looks to know what he's talking about. But, maybe that is temperature dependent? I know the chip can do some things faster than this...
Or, maybe some chips can and some can't at that point and you can't rely on it for production? Would like to know more about that...
Here's the next version that will do away with the above distribution board altogether, I hope.
I've used 32, 0R 0805 resistors to form a ground ring, skipping over the escaping i/o tracks. Its compromised again, but in different ways to the first board. I'm curious how this one goes in comparison
How do you determine the max frequency?
I just change the _clkfreq = fff_000_000 line in the spin2 code and hit F10, it either 'takes' or it doesn't.
If it doesn't, then the output pin (P2) fails to toggle, so you get '0' on the frequency counter. There's still a fair bit of Vdd current consumed, so something is going on inside, but something has corrupted in there somewhere
Think there are two types of high freq failures. One is instantaneous and the other takes seconds to minutes.
That second one might be solved here.
Wondering if raising Vdd gives it just enough to get over starting line.
Maybe there’s a huge surge on Vdd at startup that need large C very close by?
As I've said a number of times in different places, hubRAM accesses fail when running at the PLL self-limit. You have to do everything running from cogRAM to make it reliable once the target clock frequency has been set. Which means you have to explicitly set sysclock in the test code. Leave _CLKFREQ at 100 MHz or similar.
Running without RAM isn't really running.
It allows a controlled environment from which the test code can then map the failure frequency. I used hubRAM read errors.
Found the old test code. It's pure pasm2. Compile "unstable" with flexspin and it pulls in the ancient init routines I wrote before spin2 existed. It defaults to terminal baud of 230400.
Thanks for the input everyone. I'll get back to the software and testing side soon, just wanting to get this second revision to the fab
Good to see your thermistor is much closer to the P2 and you could squeeze in flash. I was wondering if that was going to be possible with no vias. You must have got creative with the routing. Having nearby passives to snake traces though often helps.
Yep the flash wasn't as bad as expected, had to narrow the SOIC-8 pads down towards the actual pin width so they'd allow two tracks in between each set of pads, but once that was done things came together ok. A few more 0 ohm jumpers... but it got there.
Other additions include the power led, and the USB-C connectors in the corner. I didn't have time to attempt routing the D+ and D- data lines, so they are just brought to pads nearby, in case we want to run Saucy's USB CDC or UVC or similar. Because I only have a single layer, I can't connect both the D+ on A row of pads to the D+ on B row, and D- (crossover) similarly, like you normally would. Maybe it will be fussy about the USB-C cable orientation, or maybe they do the same in the connector, I don't know. We'll find out.
While cleaning out some old boxes I found this Hammond Octagonal diecast box. Turns out its a good match for this board, for an 'all aluminum' solution. Mouser sell these in all kinds of powder coated colors. Part number is 1590STPC*
Here's a pic of the version 1 board with its corners sanded back enough until it fit down the bottom of the tapered diecast box. The version 2 board has these dimensions deliberately, so should fit snugly
Oh wow! The entire case is the heatsink now if it sits flat enough. Or layer a thin film of heat transfer compound between the two to fill any voids and all that heat just wicks away! You'll probably not even need a fan. Overclocking fun.
Thanks for posting this, evanh
The "answer" is... 442 MHz and a quarter can of freeze spray