Shop OBEX P1 Docs P2 Docs Learn Events
Selectable Events OR'ed together? — Parallax Forums

Selectable Events OR'ed together?

I have an been using a single interrupt routine to handle events from 3 separate interrupts. 1) Is it possible to define a selectable event that can OR 3 separate pin rising events? 2) Is it possible to set an interrupt based on 3 OR'ed selectable events? 3) Is there a better way to approach the problem?

              mov    x, f_pins                         'get f_pins for interrupt setup
              and    x, #$3F                           'f_pins base -> UL fet
              or     x, #%001_000000                   'use selectable event IN rising
              setse1 x                                 'set selectable event1 to UL fet rising
              add    x, #2
              setse2 x                                 'set selectable event1 to VL fet rising
              add    x, #2
              setse3 x                                 'set selectable event1 to WL fet rising
              mov    ijmp1, #isr1                      'use 3 interrupt to trap fet switch high
              mov    ijmp2, #isr2
              mov    ijmp3, #isr3
              setint1 #event_se1                       'these interrupts will never co-occur
              setint2 #event_se2
              setint3 #event_se3

isr1          call   #get_amp
              reti1

isr2          call   #get_amp
              reti2

isr3          call   #get_amp
              reti3

get_amp       akpin  f_pins
              akpin  amp_pin
              waitx ##SAMP_CLK << 1
              rdpin  amp, amp_pin
              mov    y, whl_dat
              add    y, #_AMP << 2
              setq   #2
              wrlong amp, y
get_amp_ret   ret


Comments

  • AribaAriba Posts: 2,690

    You can try to OR the pins with the input logic that every pin has and then use only one interrupt on the first pin.
    You OR A input and B input but mux the B input from the pin+2. This pin+2 ORs its input and that from pin+2 (=first pin+4).
    Not sure if such an OR chain works, but it's very possible.

    Something like that:

                  mov    x, f_pins                         'get f_pins for interrupt setup
                  and    x, #$3F                           'f_pins base -> UL fet
                  or     x, #%001_000000                   'use selectable event IN rising
                  setse1 x                                 'set selectable event1 to UL fet rising
               wrpin  ##P_PLUS2_B + P_OR_AB, x
               add    x,#2
               wrpin  ##P_PLUS2_B + P_OR_AB, x
                  mov    ijmp1, #isr1                      'use 3 interrupt to trap fet switch high
                  setint1 #event_se1                       'these interrupts will never co-occur
    
    isr1          akpin  f_pins
                  akpin  amp_pin
                  waitx ##SAMP_CLK << 1
                  rdpin  amp, amp_pin
                  mov    y, whl_dat
                  add    y, #_AMP << 2
                  setq   #2
                  wrlong amp, y
                  reti1
    

    Andy

  • Sounds plausible but, my independent pins are smart pins with PWM outputs. How does the pin input logic work when the IN feature is controlled by smartpin?

  • AribaAriba Posts: 2,690
    edited 2023-11-15 05:52

    No in this case it can not work. The IN is occupied by the smartpin.
    The ORed input of the 3 physical pins would go into the first smartpin statemachine, but not used there in case of PWM.

    Edit: If some neighborhood pins IN logic is free (no smartpin, only as OUT used) then you can use this pin(s) to OR it together.

  • You could maybe use the pattern match event. That will only work if the pins all go low again before the next interrupt though.

    Morning brain untested code snippet:

                  mov    x, #%10101
                  shl    x,f_pins
                  testb  f_pins,#5     wc  ' INA/INB select
                  modz   _set          wz ' Select mismatch mode (? try _clr if it isn't right)
                  setpat  x, #0
    
                  mov    ijmp1, #isr1                      
                  setint1 #event_pat
    
  • evanhevanh Posts: 15,915
    edited 2023-11-15 10:21

    _clr for not-equal. Also needs a couple more instructions to mask off the pin range.

    Ada has it right about event triggering, all three smartpin's IN will have to go back low for the event/IRQ to be retriggerable. If any two go high together before acknowledging the first smartpin then the second smartpin won't trigger an event. And if the second smartpin isn't then also acknowledged then no further events will occur.

    Keep in mind that SETPAT events are an edge trigger, not a level trigger. This detail is not stated in the docs.

  • I like the pattern event approach. In the application here, only one of the smart pins will go high at any given time so I am not sure about a fixed pattern, therefore the original OR question. Did I miss something there?

    So I am taking a back-step up the logic chain to put a conditional on which smart pin is active (which is known) and re-define the selectable event for a single interrupt for that pin. This is might be the approach a more experienced programmer would have taken to begin with...

    DAT
    
            mov   x, #pinNum
            alts  pinState, x
            mov   x, 0
            mov   y, pins
            and   y, #3F
            add   x, y
            or    x, #%001_000000
            setse1   x
            setint1  #event_se1            
    
    
    pins          long      0 addpins 7
    pinNum        long      1, 3, 5, 7
    pinState      long      1           'gets updated in code with values from 0 to 2
    x             res       1
    y             res       1
    
  • @Phonos said:
    I like the pattern event approach. In the application here, only one of the smart pins will go high at any given time so I am not sure about a fixed pattern, therefore the original OR question. Did I miss something there?

    You can program the interrupt for a pattern mismatch. That is, you set the pattern to match when all pins are low and then it fires the interrupt when it stops matching, i.e. one of the pins went high.

  • Perfect. Once again I am grateful for the insights from the forum!

  • evanhevanh Posts: 15,915

    Reassigning SETSE1 in sequence is a good idea too. You might find such easier to manage in the end.

  • PhonosPhonos Posts: 45
    edited 2023-11-16 06:04

    I'll try both and see what appears to tighten up the code the best.

    Update: setpat approach works great. It reduced code length and took computation out of the process loop.
    Thank you for the expert help.

Sign In or Register to comment.