PropSPI: Emulation of a generic SPI RAM chip, using the Prop2
Gave it a new name just now.
I've been beavering away on this for some weeks now and just posted the first stable code for Chintan's and Disha's and Kundan's ink jet printer project - https://forums.parallax.com/discussion/174747/spi-communication-between-parallax-p2-and-raspberry-pi/p1
- https://forums.parallax.com/discussion/174685/require-specific-guide-manual-for-propeller-2-gpio-coding-in-c-c/p1
In a nutshell, PropSPI acts as a simple memory array. Not dissimilar to how a SPI PSRAM chip might operate. As such, PropSPI is most useful as an interchange between two CPUs - Initially it has been developed as a simple high volume data link for a Raspberry Pi to stream large amounts of data to a Prop2.
Performance wise, the memory array can be written to at up to sysclock/3. So that's 100 Mbit/s if sysclock is over 300 MHz. Read speed isn't as fabulous since the internal I/O latencies all pile up on the Tx pin and it becomes tricky to manage clock phase. There, sysclock/7 is the expected limit although /6 seems to look okay too. Testing has only been done as a loopback so far. 50 Mbit/s might be reliable.
Also has responsive repetitive handling. Can accept a fresh command beginning in less than 100 nanoseconds from prior data. Specifically, 20 sysclock ticks after rising edge of CS pin.
Update 2023-9-30: Added a version number and MIT licence
Update 2023-10-8: Version 2 release. API changes - Read source code docs.
Comments
Here's a simple example for starting up PropSPI in Spin2 and C. This still needs a master connected up to operate the pins.
Thanks for sharing, Evan!
I am still wondering, how a P2 and a ESP32 could share the same file system. For the ESP32 I have a way that a Windows PC can access its SPI flash file system as a network disc over WLAN, which makes sending and receiving of data very simple. It would be nice to extend this to a P2.
Christof
Ha, that could work I guess. It'd have to have some volume locking mechanism added if you wanted to allow the Prop2 to make changes to those files as well.
In theory, for more space than hubRAM, the allotted array/filesystem could be in an attached PSRAM or even a Flash chip. Although the latencies could blow out a lot doing this.