ADC voltage references

technopol

What are the ADC zero and FS voltage references (in 1x scale)? My guest is GND and VIO but just want to make sure.

And in 100x scale I guess FS = VIO/100?

technopol

msrobots

actually it is lower then gnd and over VIO, sort of 0.25 V each

evanh

The 1x span is about 5.0 Volts. So, max = VIO/2 + 2.5V and min = VIO/2 - 2.5V. Therefore 100x span will be about 50 mV.

PS: It has been observed that the front-end noise floor makes 10x as the highest gain practical. 31x and 100x just reduces the Effective Number Of Bits - which is around 12 or 13 bits best case. The ADCs are noisier than the 8-bit DACs are ... Which maybe more a testament to how good the DACs are.

Ariba

What are the ADC zero and FS voltage references (in 1x scale)? My guest is GND and VIO but just want to make sure.

And in 100x scale I guess FS = VIO/100?

technopol

Yes, the "references" to measure are GND and VIO. The names of the constants to select these modes make that quite clear:
P_ADC_GIO, P_ADC_VIO.
Maybe you use a library / an object that uses the names Zero and FS, but then it should be described in this object what that means.

These calbration modes exist only for 1x ADC gain, they are not applicable for higher gains.
The ADC measures always from the midpoint (~1.65V) up and down. In 1x mode the voltage span reaches the GND and VIO levels, but in higher gain modes these "references" are outside the measurable range.

Andy

technopol

@evanh said:
The 1x span is about 5.0 Volts. So, max = VIO/2 + 2.5V and min = VIO/2 - 2.5V. Therefore 100x span will be about 50 mV.
PS: It has been observed that the front-end noise floor makes 10x as the highest gain practical. 31x and 100x just reduces the Effective Number Of Bits - which is around 12 or 13 bits best case. The ADCs are noisier than the 8-bit DACs are ... Which maybe more a testament to how good the DACs are.

Thanks so much!

So if I want a SNR equivalent to 12-bit or more, I guess I better use an external ADC, right?
Are these infos somewhere in the docs???

pik33

There are several topics about ADCs here on the forum, maybe someone can find a link. There is a lot of data, tables and plots as a result of testing these ADCs.

12 bits is the maximum practically available because of noise. More than 12 bits needs an external ADC or connecting the signal to more than one pin at once and average, for example, 4 ADCs.

DACs are at another level with over 100 dB SNR.

technopol

@pik33 said:
12 bits is the maximum practically available because of noise. More than 12 bits needs an external ADC or connecting the signal to more than one pin at once and average, for example, 4 ADCs.

Perhaps adding very low ESR cap(s) close to the corresponding VIO pin with a shunt resistor, a lot of PCB shielding and 4 synched and averaged ADC might give something like 84dB SNR (14-bit). I'll try that before adding more chip to my design.

Thanks!