Is it possible to use an external 5MHz square wave clock with PLL16x?
Cabbage
Posts: 37
in Propeller 1
I'd like to connect a signal (5 MHz, square wave, 50% duty cycle, 0 V to 3.3 V) to the Propeller's XIN pin and use the PLL16x mode to multiply that frequency up to a system clock rate of 80 MHz.
However, it seems that the PLL16x has no effect when XINPUT is used.
Is there a way to achieve this?
Comments
It works. I've been using a 6 MHz oscillator module that way. They're much smaller as surface mount parts these days.
Flexspin has a bug in its handling of _CLKMODE. When attempting to specify XINPUT + PLL16X it messes up. You can instead specify XTAL3 + PLL16X and it'll work. I've been bypassing the use of _CLKMODE myself. Instead I use the runtime clkset() function.
CON { RCFAST only CLKFRQ = 13_000_000 OSCSEL = 0 ' 0 = XIN only, 1 = 4..16 MHz crystal, 2 = 8..32 MHz crystal, 3 = 20..60 MHz crystal CLKSEL = 0 ' 0=RCFAST 1=RCSLOW 2=XIN 3=PLL1X 4=PLL2X 5=PLL4X 6=PLL8X 7=PLL16X '} { PropRPM PCB: regular 5 MHz crystal CLKFRQ = 80_000_000 OSCSEL = 1 ' 0 = XIN only, 1 = 4..16 MHz crystal, 2 = 8..32 MHz crystal, 3 = 20..60 MHz crystal CLKSEL = 7 ' 0=RCFAST 1=RCSLOW 2=XIN 3=PLL1X 4=PLL2X 5=PLL4X 6=PLL8X 7=PLL16X '} '{ Custom PCB: 6 MHz SMD oscillator module CLKFRQ = 96_000_000 OSCSEL = 0 ' 0 = XIN only, 1 = 4..16 MHz crystal, 2 = 8..32 MHz crystal, 3 = 20..60 MHz crystal CLKSEL = 7 ' 0=RCFAST 1=RCSLOW 2=XIN 3=PLL1X 4=PLL2X 5=PLL4X 6=PLL8X 7=PLL16X '} PUB example clkset( (CLKSEL>1)&32 | OSCSEL<<3 | (CLKSEL>2)&64, 13_000_000 ) ' config PLL but stay in RCFAST waitcnt(clkfreq>>6 + cnt) 'Wait 1/64 second for OSC/PLL stable clkset( (CLKSEL>1)&32 | OSCSEL<<3 | (CLKSEL>2)&64 | CLKSEL, CLKFRQ ) ' PLL switch over ...Interesting. I'm not actually using Flexspin, I'm using Brad's Spin Tool under Linux.
Your suggestion worked though! Thank you
My plan is ultimately to use a GPSDO as the clock source (a "Leo Bodnar Mini GPS Clock") set to 10 MHz, then terminate into 50 Ohms at the Propeller's XIN pin, then use all 16 of the Prop's Counters to generate arbitrary frequencies for use elsewhere in my lab!
Cheers.
Might be a more widespread bug then. I've not tried anything else beyond Flexspin. It's my first Prop1 project.
My understanding is the PLL won't handle a 10 MHz input. It tops out around 7 MHz. This is because the Prop1's PLL, unlike the Prop2, is a fixed 16X for the internal VCO, with a post-16X divider to get 8X (/2), 4X (/4), 2X (/8) and 1X (/16). 16 x 10 MHz internally is too fast for it.
So for 7 MHz and up, the Prop1 sysclock can only be a pass-through of XINPUT.
10 MHz PLL input is fine. Ye olde Hydra board uses 10MHz crystal with PLL8X.
Damn ... that's good. I guess the PLL can go a lot faster than the rest of the chip then.
Now I think about it, Chip did place an arbitrary frequency cap on the Prop2's PLL. Intended to prevent crashing the cogs from over-speed. I have no idea how fast it could've gone. Sadly, it's still a little fast and can corrupt hubRAM as a result.
I think you can actually do PLL16X with 10MHz crystal (as long as you only use one cog).
Not as easy to quickly test as the Prop2. Would need a programmable frequency synthesiser on XIN.