HDMI: maximum different simultaneous outputs on one P2
Ltech
Posts: 380
Quick question
for testing purposes, how manny different HDMI connections can work on one single P2?
Fixed test patterns with ID 480p , 720p (or ideally1080i 1900x1080 25/30Hz )
Can I expect more than one?
Thanks
Daniel
Comments
Quick answer: theoretically, one per Cog, so a maximum of eight per P2 chip.
The theorectically-part was kind of a warning, aggregated to the answer, since each eight-consecutive=pin-group, starting with 0, 8, 16,... 56 can be programmed into one of the two available DVI/HDMI pin-function-scheme (layout-wise), but some pins have been given pre-determined functions, like the ones at the last I/O group [63:56], meant for transactions during boot time.
And sure, there is the group whose power is fed by V2831, which can mess with the PLL stability, in certain boards and circumstances.
In reality, six different DVI/HDMI connections can be expected to be realiably worked-out.
It'll be kind of a "fest" for the eyes!!!
P.S. all the above implies the same P2 Sysclk settings can be used for the intended connections, for them to be simultaneouslly active, otherwise, the non-conforming ones would need to be "muted"-out, if they can't lead to meaningfull interpretation by the sink it's connected.
The good news about dot-clock frequency is that modern HDMI displays have relaxed mode timings. They don't need specific line/field frequencies either. Ie: Blanking timings are flexible. The transmitted resolution is presumably determined from the TMDS encoded keys.
Which means that many lower resolutions are accessible to a common higher dot-clock via extended blankings. Including resolutions below 640x480.
On the topic of higher resolutions, the TMDS encoder is locked at sysclock/10. Meaning the max dot-clock is around 34 MHz. Again, modern HDMI displays will generally operate down at 24 Hz full frame refresh. So some higher resolution is achievable on the limited frequency dot-clock. 720p is about the upper limit though. 800 maybe.
Full VRR rated displays may be able to operate down at 1 Hz! Something to try out when someone has one.
V2831 oscillator instability is resolved by using a stand-alone oscillator module with integrated crystal. They are actually easier to buy than bare crystals these days. The PLL was being disturbed by crystal instability, so it works fine once the crystal is stable.
If you are willing to go wildly offspec with timing, you can probably do 4 HDMIs with two cogs.
The first one generates staggered sync patterns (with enormous hblank) for all 4 outputs and the other switches its TMDS generator between them to fill in the active areas.
Thank-you all
You could drive three HDMI monitors from 8 pins and one cog if you settle for monochrome.
Send the clock pair to all three monitors, then take the R(ed) pair and wire them into the R, G, and B pairs of the first monitor. Wire the G(reen) pair into the R, G, and B pairs of the second monitor. Wire the B(lue) pair into the R, G, and B pairs of the third monitor.
Then, each of the R, G, and B fields will drive a unique monitor.
If you did this with seven cogs, leaving one cog for high-level programming, you could drive 21 HDMI monitors in monocrome mode.
I don't think that'd work properly. You're not supposed to split the pairs multiple ways.
I think it would just be data and it would not care. There is plenty of drive from the P2 pins to do that.
An HDMI splitter takes an HDMI video output from a device, like a Roku, and splits it into two separate audio and video streams. Once split, you can then send video to two separate monitors from a single source.
anonigviewer
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