Dumb question. Can a smartpin be utilized by a cog other than the one that initialized it? I know normal pin operations are ORed, but what about smartpin operations?
Thanks in advance.
Any Cog is ever free to use any Smart pin, irrespective to the Cog that programmed it.
As a shared resource, care must be taken so as to don't try programming or use any of the Smarts, without taking care of either using a Lock, or be ensured to "inform" any other pin-user-Cog that you (Cog) is going to "take control" over the pin.
The so-called "Quiet"-tagged pin-operations are your best friends; try to resort to them, if possible, even before thinking about using Locks.
Hope it helps
P.S. should have stated this, as a preamble: no question is dumb; dumbness is a characteristic connected to the absense of any questions (and also it's very frustrating, from the standpoint of the ones that are able to answer them...)
Yes. Each Smartpin is a mini-processor (mode configured state machine) in its own right. Once started, by any Cog issuing a WRPIN with appropriate mode word, the Smartpin will continue running in that mode until changed with another WRPIN, also by any Cog.
The DIR bit is a reset control, when in a smart mode, for each Smartpin. But DIR doesn't clear the mode.
As others have stated, yes. I tend to setup my smart pins in Spin, even if they're going to be used in a PASM cog (see jm_fullduplexserial.spin2). If I need to reset the smart pin in the other cog, I make sure that DIR bit for the pin is clear (with pinfloat) in the setup cog. Here's an example. I want to be able to reset the data out pin in the other cog, so the DIR bit is cleared in the setup cog.
m := P_SYNC_TX | P_OE ' spi tx mode
m |= ((clk-dout) & %111) << 24 ' add clk offset (B pin)
x := %1_00111 ' start/stop mode, 8 bits
pinstart(dout, m, x, 0) ' setup smart pin
pinf(dout) ' reset/disable until used
Thanks all! I have used locks for my W6100 ethernet driver and they work perfectly. I may wind up doing that for this application, because it worked so well and this resource may need to accept input from multiple cogs. I just need to ensure that all atomic operations are grouped in a way that the locks are effective.
Resource control/access is the term. Locks can be used to achieve that.
Smartpins don't require any atomic operations. The Cordic does though - Since there is only one result buffer per Cog, when utilising the Cordic's pipeline for multiple commands, the results need to be serviced within a limited time. Interrupts occurring will break that requirement. So, atomic ops require interrupt management. You'll see atomic op examples in the Spin2 interpreter's source code - Often a REP #1 apparently doing nothing. Chip has made a point of allowing use of interrupts within Spin2.
I was referring to the resource that I was going to access as needing atomic operations. There are multiple operations that must occur as a set, otherwise the operations will yield unexpected results. This was not the case with the ethernet driver for the W6100. I just needed to lock access to the hardware for that.
It may not even be worth the effort to implement locks, given the many permutations of operations that must occur as a set. I have a special use case, and really does not require it.
BTW, I had no problems with the smartpins being used in a different cog. It all just worked!
When you're in control of all resources there isn't many cases, if any, where a lock is needed. Locks create serialisation which often forces undesirable slowdowns. Windoze is renowned for it.