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P2 SSI (synchronous serial interface) — Parallax Forums

P2 SSI (synchronous serial interface)

Has anyone done an SSI with smart pins on the P2?


  • @RS_Jim said:
    Has anyone done an SSI with smart pins on the P2?

    That would be nice :+1:

    And then we could have BiSS :smile:
    Which is something I brought up in the past.

  • Ok then, if I have to develop my own code for a smart pin SSI, I have a ton of questions.
    1. The SSr and the SSt (read receive and transmit functions) mention in the notations A&B pins A being data and B as the clock. So how do I know which pin is A and which is B?
    2. I assume that X & Y could track the clock frequency and how many bits times are in the complete data word. Where is that info
    3. I believe that a third pin is used as CSN and could be used to start the clock or turn on its output and gate the counting.
    4. It appears to me that to interface to a chip that is using an externally generated clock (AS5040) to clock out its data, I have to use both the SSI transmit function and receive function because I need the clock for the chip, generated by transmit and the receive function needs the clock to correctly receive its data. Might I use 1 pin for both transmit and receive clock with the output enabled on the transmit side and the receive just listening to the same pin for its data.
    5. I believe that I can use the TT bits of the the smart pin command to enable/disable the transmit data out which sort of says to me that I could use just two pins for transmit and receive (data and clock) with the output data enabled/disabled depending on which function I am using
    6. The CSN signal needs to go low to start the clock and and bit counting for the input data. After the appropriate number of bits are received, the CSN needs to return high to trigger the chip to get ready for another read.
    I am sure I will have other questions as I go on but these answers will get me started.

  • AribaAriba Posts: 2,567

    1) normally pin A is the pin you use as smartpin, Pin B must be an adjacent pin +/- 3 pins from A.
    2) The descripton of the smartpin modes is in the Ref_B_C_Silicon document.
    3) You must handle the CSn pin by yourself in the code.
    4) Yes you should use the same pin for Rx and Tx clock. The clock for SyncSerial modes is always an external input, if you need to provide the clock, you need to use another smartpin in Transition mode on the clock pin.
    5) If you want one pin for Rx and Tx, you can switch the smartpin mode accordingly, otherwise you need another adjacent smartpin for Rx. You can't have two smartpin modes on the same pin.
    6) Yes, you do this in your code: CSn low; start nbits x 2 clock transitions; wait until done; CSn high. (If you generate CSn and the clock)

    I think there are examples of the SyncSerial smartpins to access the Flash. Look here


  • evanhevanh Posts: 12,230

    A and B smartpin inputs are specified in WRPIN bit-fields %AAAA and %BBBB. They both default to the same pin of +0.

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