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Looking for circuit suggestions or examples to boost logic level — Parallax Forums

Looking for circuit suggestions or examples to boost logic level

Don MDon M Posts: 1,652
in General Discussion

I'm working with a serial device that resides on a bus. The problem I'm having is that it won`t recognize or respond to the logic pulse on the bus. The bus is driven by 5 volts but as more devices are added it pulls the logic high level down. The devices use opto isolators and can draw any where from 10mA to 35mA. The particular device I'm working with won't recognize the logic pulse if it isn't at least 4.5 V high. If I disconnect some of the devices on the bus then my device will then work.

I know that the main controller driver could be beefed up to provide more current but that is not an option. Nor is it an option to modify the device I'm working on to work at a lower logic level.

As a proof of concept I kludged together an npn transistor to drive a high side p-channel mosfet fed by a 5V supply and i got it to work. I feed the existing signal to my circuit and then my circuit then feeds the bus. However the waveform is very noisey even though it works.

What I'm looking for is any suggestions to solve this.

Thanks.

Comments

  • YanomaniYanomani Posts: 1,524
    edited 2021-10-05 02:46

    There can be many other solutions, capable of helping you solve the problem; the following non-inverting schmitt-trigger buffer (from TI) is just the first one that occurred to me:

    https://ti.com/product/SN74LVC1G17

    In case it's too fast for your application, inserting a low-value resistor in series with its output will avoid excessive ringing.

    Note that you can power it with less than 5 V, while still being able to give it a 5 V logic input signal.

    The high level output will be limited to Vcc it's being fed, though.

    As usual, good supply decoupling is a must, in order to avoid extra head aches.

    Hope it helps

    Henrique

    P.S. In case you need more than 32mA (just noted that possibility on the original post), you can use the following one:

    https://ti.com/product/SN74LVC2G125-Q1

    It will accept being paralleled, so both elements of the same package can act as a single one, and still operate as expected (the outputs can withstand infinite duration shorts to VCC or GND, up to a 100 mA limit).

  • jmgjmg Posts: 15,173

    @"Don M" said:
    The devices use opto isolators and can draw any where from 10mA to 35mA.

    How many of these do you need to drive, and at what speed ?

    @"Don M" said:
    The particular device I'm working with won't recognize the logic pulse if it isn't at least 4.5 V high. If I disconnect some of the devices on the bus then my device will then work.

    That's not much margin for a 5V system.
    If multiple parallel logic buffers at 32mA (as above) are still not enough drive, you could look at MOSFET gate drivers, choose ones that are built using PFET/NFET pairs and can drive rail-rail.
    If you need still more current, then a P/N mosfet pair, with external dead-band control, lets you pick any drive level you want, up to many amps....

  • evanhevanh Posts: 15,912
    edited 2021-10-05 04:19

    I'm thinking ground slope issue causing apparent threshold change. Probably need to eliminate other currents.

  • Don MDon M Posts: 1,652

    @evanh said:
    I'm thinking ground slope issue causing apparent threshold change. Probably need to eliminate other currents.

    No that's not the case here. Devices are daisy chained.

  • Don MDon M Posts: 1,652

    @Yanomani said:
    There can be many other solutions, capable of helping you solve the problem; the following non-inverting schmitt-trigger buffer (from TI) is just the first one that occurred to me:

    https://ti.com/product/SN74LVC1G17

    In case it's too fast for your application, inserting a low-value resistor in series with its output will avoid excessive ringing.

    Note that you can power it with less than 5 V, while still being able to give it a 5 V logic input signal.

    The high level output will be limited to Vcc it's being fed, though.

    As usual, good supply decoupling is a must, in order to avoid extra head aches.

    Hope it helps

    Henrique

    P.S. In case you need more than 32mA (just noted that possibility on the original post), you can use the following one:

    https://ti.com/product/SN74LVC2G125-Q1

    It will accept being paralleled, so both elements of the same package can act as a single one, and still operate as expected (the outputs can withstand infinite duration shorts to VCC or GND, up to a 100 mA limit).

    Thanks for the suggestion. I have ordered some of the CLVC2G125IDCTRQ1 and will give them a try. The speed is only 9600 baud and 100 mA by coupling several outputs together should be sufficient. I'll be curious to see when it's driving a 65 mA load how much if at all the output voltage sags down. If it can stay at the 5V level then problem solved.

  • jmgjmg Posts: 15,173

    @"Don M" said:
    I'll be curious to see when it's driving a 65 mA load how much if at all the output voltage sags down. If it can stay at the 5V level then problem solved.

    The data guarantees less than 0.8V droop at 4.5V Vcc and 32mA per driver pin.
    If it is only 9600 baud, you could use a PFET and a modest N FET with a pull down resistor to avoid conduction contention - eg 250 Ohms pulls down 20mA
    If you want 100mA drive and say 200mV drop MAX, that's less than 2 ohms on the PFET - lots of choices there.

  • Don MDon M Posts: 1,652
    edited 2021-10-05 20:46

    @jmg said:

    @"Don M" said:
    I'll be curious to see when it's driving a 65 mA load how much if at all the output voltage sags down. If it can stay at the 5V level then problem solved.

    The data guarantees less than 0.8V droop at 4.5V Vcc and 32mA per driver pin.
    If it is only 9600 baud, you could use a PFET and a modest N FET with a pull down resistor to avoid conduction contention - eg 250 Ohms pulls down 20mA
    If you want 100mA drive and say 200mV drop MAX, that's less than 2 ohms on the PFET - lots of choices there.

    Would you care to share more? I'd be interested in what you have in mind for the 100 mA version.

  • jmgjmg Posts: 15,173

    @"Don M" said:

    @jmg said:
    If it is only 9600 baud, you could use a PFET and a modest N FET with a pull down resistor to avoid conduction contention - eg 250 Ohms pulls down 20mA
    If you want 100mA drive and say 200mV drop MAX, that's less than 2 ohms on the PFET - lots of choices there.

    Would you care to share more? I'd be interested in what you have in mind for the 100 mA version.

                         [--- +5V 
          +-------<] [  PFET
          |          [--+   
          |             |    
 ---------+     A       +------->     
          |             |    
          |          [--+
          +------->] [  NFET                  
                     [--+           
                        |            
                       GND     

                     [--- +5V 
          +-------<] [  PFET  < 2 ohms 
          |          [--+   
          |             |    
 ---------+    B        +---------+--------->     
          |              250R     | 
          |          [--/\/\/\/---+
          +------->] [  NFET   20 Ohms or less
                     [--+     
                        |     
                       GND

    The classic CMOS inverter is A, but that is prone to common conduction spikes.
    Since your loads are LED to GND, you do not need high negative drive, so B shows a simple resistor in the N FET, which lets you control drive and contention limits.
    Digikey shows over 1000 parts < 1.5 Ohms so you pick anything. Going << 100mOhms increases Cgs, for no useful gain in drop.
    If you need no logic inversion, drive this with any single gate inverter.

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