ALTB uses D[13:5] and ALTD uses D[8:0] syntax question
Bob Drury
Posts: 236
in Propeller 2
ALTB and ALTD apears to perform the same with the exception that D[13:5] is used instead of D[8:0]
in ALTD the D destination register provides a clue to altering D but what does B in ALTB reference and
why have this funny offset of D13:5] the Propeller II PASM notes alludes to the same question. ALTB is not just an alias so there must be some reason.
Regards
Bob (WRD)
Comments
I had to look that one up. Its purpose is similar to the likes of ALTSN/ALTGN but works more like ALTD in that where ALTD prefixes longword operation instructions, ALTB prefixes the bit-operation instructions instead. Ie: It provides a bit resolution indexing within cogRAM. Example is in the silicon doc:
The description in the docs takes a little to perceive. You need to pay attention to Chip's use of "bit[]" and "D field to bitindex[13:5]". When it says bit[] that means addressing within the longword. And when it says "D field to bitindex[13:5]" that is effectively saying index in steps of 32 because each indexed longword is 32 bits long.
So, the least 5 bits of "bitindex" are correctly the bit resolution of indexing.
I guess D[13:5] and S[4:0] allow different bits to be accessed across words but I think this could be accomplished with ALTD thus more commands to remember that esentially do the same thing.
but I see that the word bit relationship might help.
Regards and Thanks
Bob (WRD)
Uh,oh!
From the P2 Datasheet:
The above code example won't work.
This means you no longer can use ALTB with BITx instructions as the index now needs to be masked to 5 bits.
Oh, dang, you're right. ALTB should be modifying both S and D fields. With BITC's S using # immediate addressing, so more similar.to GETNIB/SETNIB then.
Luckily @cgracey added the SETQ override to get around this scenario.
Wow! LOL, how that even works needs extensively documented on every source line it get used on!
EDIT: And with ALTBs pre-incrementing flaw - https://forums.parallax.com/discussion/comment/1527449/#Comment_1527449 it definitely got a tad overlooked during instruction testing.