Just to confirm that the analog part of the scope is faking it, here is the logic part of it set to a 1.8V threshold. There is no way the digital signal should be indicating a high that early against the sine wave looking clock, and then going low too early etc.
@"Peter Jakacki" said:
... There is no way the digital signal should be indicating a high that early against the sine wave looking clock, and then going low too early etc.
Compared to what? And what is each probe connected to?
EDIT: Oh, you're talking about the clock representation. And from that you're saying nothing is reliable about the Rigol's display. That's making some negative accusations towards Rigol!
Hmm, there could be another explanation in that image: There's only 5 sample points per division. The logic traces will show transition at those points without adjustment, whereas the analogue traces will be interpolated and phase adjusted.
At that time resolution it's not possible to precisely compare the two types of traces. You need much higher effective sampling rate.
Actually I am not happy with many aspects of Rigol's equipment in general having used their stuff for the past 10 years or more. It looks nice, it's not too expensive, but the firmware options aren't nice, and aren't worth the money either. Also they don't care about firmware upgrades either even when there are real glitches and sheer awkwardness in the user interface for instances. The decoders are very limited and could do a much better job of displaying the larger picture, but that will never happen, unless maybe I buy the latest model and pay the extra bucks to try out and be disappointed by their new features.
My little Tek TBS1052B is faster and easier to use. I am looking at some other scopes now but I am wary of the MSO LA functions since it is so limited and really awkward to use on the Rigol scopes. Yes, it "works", but it is not very usable. A friend just paid big bucks for the latest Rigol MSO and has wasted his money it seems since a unit 1/10 of the price will do the job better.
We just need to combine a P2 and a Pi with some extra hardware and crowdfund an OSS multiscope. It could even have expansion connectors too. One thing I would always do is make it run from 5V or 12V as mains and a earth means I can't use it in the field except with an awkward UPS.
Logic analysers need a lot of oversampling, period. That's the only way for them to show precise relational timing. It's interesting, never having owned one, I'd never considered the implications of using a mixed signal scope before.
EDIT: So, on a spec sheet, a specific memory depth is probably worth more to a DSO than a LA. The Logic Analyser needs at least 10x more samples for the same timing resolution.
EDIT2: To give that some numbers: Where 5 samples per clock period is fine for a DSO, you'd be wanting 50 samples per clock period on a LA.
For logic analyzers, you can do a lot worse than the $8 "24MHz usb logic analyzers" that are basically breakout boards for the Cypress fx2 microcontroller. The sigrok software suite, and especially PulseView is absolutely fantastic. If you need something faster, it may be worth looking at the "supported hardware" list for sigrok.
If you want to make something propeller or p2-based, the SUMP protocol maybe worth looking at.
Peter,
In case I wasn't clear before, my conclusion is the logic traces at that time resolution are erratic at best. The logic analyser can't be relied on there. Therefore they also can't be compared with the analogue traces, which have a significant advantage whereby the time resolution is boosted by the amplitude resolution via interpolation.
So there is still the outstanding issue with your SD data trace. Unless you've setup a DDR mode, a single bit time of low-high-low should be twice the length of a clock pulse. Even longer for multiple bits at one level. That should be easily visible on the scope.
Comments
Just to confirm that the analog part of the scope is faking it, here is the logic part of it set to a 1.8V threshold. There is no way the digital signal should be indicating a high that early against the sine wave looking clock, and then going low too early etc.
Compared to what? And what is each probe connected to?
EDIT: Oh, you're talking about the clock representation. And from that you're saying nothing is reliable about the Rigol's display. That's making some negative accusations towards Rigol!
Hmm, there could be another explanation in that image: There's only 5 sample points per division. The logic traces will show transition at those points without adjustment, whereas the analogue traces will be interpolated and phase adjusted.
At that time resolution it's not possible to precisely compare the two types of traces. You need much higher effective sampling rate.
Actually I am not happy with many aspects of Rigol's equipment in general having used their stuff for the past 10 years or more. It looks nice, it's not too expensive, but the firmware options aren't nice, and aren't worth the money either. Also they don't care about firmware upgrades either even when there are real glitches and sheer awkwardness in the user interface for instances. The decoders are very limited and could do a much better job of displaying the larger picture, but that will never happen, unless maybe I buy the latest model and pay the extra bucks to try out and be disappointed by their new features.
My little Tek TBS1052B is faster and easier to use. I am looking at some other scopes now but I am wary of the MSO LA functions since it is so limited and really awkward to use on the Rigol scopes. Yes, it "works", but it is not very usable. A friend just paid big bucks for the latest Rigol MSO and has wasted his money it seems since a unit 1/10 of the price will do the job better.
We just need to combine a P2 and a Pi with some extra hardware and crowdfund an OSS multiscope. It could even have expansion connectors too. One thing I would always do is make it run from 5V or 12V as mains and a earth means I can't use it in the field except with an awkward UPS.
Logic analysers need a lot of oversampling, period. That's the only way for them to show precise relational timing. It's interesting, never having owned one, I'd never considered the implications of using a mixed signal scope before.
EDIT: So, on a spec sheet, a specific memory depth is probably worth more to a DSO than a LA. The Logic Analyser needs at least 10x more samples for the same timing resolution.
EDIT2: To give that some numbers: Where 5 samples per clock period is fine for a DSO, you'd be wanting 50 samples per clock period on a LA.
For logic analyzers, you can do a lot worse than the $8 "24MHz usb logic analyzers" that are basically breakout boards for the Cypress fx2 microcontroller. The sigrok software suite, and especially PulseView is absolutely fantastic. If you need something faster, it may be worth looking at the "supported hardware" list for sigrok.
If you want to make something propeller or p2-based, the SUMP protocol maybe worth looking at.
Peter,
In case I wasn't clear before, my conclusion is the logic traces at that time resolution are erratic at best. The logic analyser can't be relied on there. Therefore they also can't be compared with the analogue traces, which have a significant advantage whereby the time resolution is boosted by the amplitude resolution via interpolation.
So there is still the outstanding issue with your SD data trace. Unless you've setup a DDR mode, a single bit time of low-high-low should be twice the length of a clock pulse. Even longer for multiple bits at one level. That should be easily visible on the scope.