Smart-Pin asynchronous transmission logic level

JonTitus

When I run the attached test code the bits appear properly on my scope but the initial state of the Smart-Pin transmitter pin appears as a logic-0. After the first transmission, this pin remains a logic-1 between transmissions. Based on experience with UARTs, the output should start at logic-1 so the receiving device "sees" the logic-1 to logic-0 edge of the start bit. How can I get the output pin to start as a logic-1? Thanks. --Jon

'Async Transmit Ver 2, 6-10-2020 at 1528H MDT
'Thanks to Ray Rodrick, et al.

CON

' Constants for serial-port control
  _rxpin   = 21                                        ' P21, serial in
  _txpin   = 20                                        ' P20  serial out
  '_baud    = 115_200				       ' not used
  _bitper  = $3640_0007				       ' bit rate for tests
  _txmode  = %0000_0000_000_0000000000000_01_11110_0   'async tx mode, output enabled for smart output
  
DAT              
                wrpin   ##_txmode,  #_txpin       ' set Smart-Pin asynchronous transmit mode
                wxpin   ##_bitper,  #_txpin       ' set transmit bit period for 8 bits of data
                dirh    #_txpin                   ' enable smart pin tx 
		nop
                wypin   #$55,       #_txpin	  ' transmit test bit pattern 01010101
                nop
.flag_test      testp   #_txpin  wc               ' wait for transmit buffer empty               
        if_nc   jmp     #.flag_test		  ' if not empty, test again
                waitx   ##25_000_000 / 70         ' delay inserted for testing
		wypin   #$99,        #_txpin      ' send testing byte to tx pin
               	jmp #.flag_test			  ' transmit "forever"

jmg

JonTitus wrote: »

When I run the attached test code the bits appear properly on my scope but the initial state of the Smart-Pin transmitter pin appears as a logic-0. After the first transmission, this pin remains a logic-1 between transmissions. Based on experience with UARTs, the output should start at logic-1 so the receiving device "sees" the logic-1 to logic-0 edge of the start bit. How can I get the output pin to start as a logic-1? Thanks. --

Maybe you are hitting the fact the default P2 pin state after reset is floating ? - so you need an external pullup, if you want a defined TXD idle level during reset.
If you are ok with a floating pin during reset, you can pgm an internal pullup before the pin is used as TXD.

Cluso99

This is the code (snippets) I use. I've not noticed any problems but I've not checked the pin with a scope.

CON
  _BAUD         = 115_200
  _bitper       = (_clkfreq / _BAUD) << 16 + 7  ' eg ?? baud, 8 bits
  _txmode       = %0000_0000_000_0000000000000_01_11110_0   ' async tx mode, output enabled for smart output
  _rxmode       = %0000_0000_000_0000000000000_00_11111_0   ' async rx mode, input  enabled for smart input
.....
DAT
_SerialInit     wrpin   ##_txmode,        #tx_pin       ' set asynchronous tx mode in smart pin tx
                wxpin   mon.x,            #tx_pin       ' set tx bit period + #(bits-1)
                dirh    #tx_pin                         ' enable smart pin tx

                wrpin   ##_rxmode,        #rx_pin       ' set asynchronous rx mode in smart pin rx
                wxpin   mon.x,            #rx_pin       ' set rx bit period + #(bits-1)
                dirh    #rx_pin                         ' enable smart pin rx

                mov     mon.x,            #mon.CR       ' we have to prime send buffer empty flag,
                wypin   mon.x,            #tx_pin       ' ... so send <cr> to tx pin
              RET                               wcz     '                       <--- return to calling routine --->

_HubTx         MOV       mon.w, mon.x                   '                       < push: 'x'    #0 >
'               ----------------------------------------
.send           testp   #tx_pin                 wc      ' wait for buffer empty on tx pin
        if_nc   jmp     #.send                          '
                wypin   mon.x, #tx_pin                  ' send byte (bits7:0) to tx pin

                shr     mon.x, #8               wz      ' any more chars to send?
        if_nz   jmp     #.send                          '> br back:  (nz = another char in mon.x)
'               ----------------------------------------
              MOV       mon.x, mon.w                    '                       < pop:  'x'    #0 >
              RET                               wcz     '                       <--- return to calling routine --->

Peter Jakacki

I've interacted with this in TAQOZ and the output becomes a high the moment you set the smartpin mode on WRPIN. Before that like any micro, the pin is floating by default and so if you design the chip into a system and want this to be high by default, then add a pull-up like we do on any MCU.

This code configures P54 as serial transmit. The moment WYPIN which is equivalent to the PASM WRPIN is executed, then P54 switches from a floating input and becomes a high output.

54 PIN  $7C WRPIN

Normally in TAQOZ the pin would be configured at a higher level like this:

54 PIN  115,200 TXD

which sets the baud rate and 8-bit data by default and also writes a null character to prime the ready signal.


EDIT: Just to confirm exactly when the pin goes high, I added a test pulse around WYPIN and scoped it.

54 PIN   55 LOW 55 HIGH   $7C WRPIN    55 LOW

Trace 1 = P54=TX
Trace 2 = P55 test pulse