Seems my minimum aq loop is actually 24 clocks, now that I look more closely... That should make the math work...
'Now, aquire while checking for trigger
AqLoop
'check for trigger
TrigCondition
if_nc testpn TrigPin wc 'Note: This long replaced by self-modified code
if_c sub d2,#1
if_nc add d1,#16'8 'keep track of where trigger occurred
'digital
wflong ina
wflong inb
'analog
AqA1 rqpin ain,#8
wflong ain
AqA2 rqpin ain,#9
wflong ain
'wait
waitx acqWait 'making a register so don't need ##
'loop
tjz d2,#FlagDone
jmp #AqLoop
Added cursors to show clocks and freq between them.
This pointed an error in my clocks/loop calculation...
Changed the bottom of the loop like this and now all good:
BTW: Since it captures both INA and INB at every point, you can actually change the digital pin number in "Single" mode after a trigger and see what is on any other pins.
Now, I just want to add some DDS controls and then I think I'll declare victory and move on to something else...
I should mention that I'm using jumpers to connect DDS output pins to analog input pins. I think that maybe I could do this without jumpers in Rev.B silicon, but wouldn't work for Rev.C.
Thanks to Chip's HDMI scope example I was able to implement the analog without fully understanding it... Now, I'm trying to figure out what is happening...
For testing, I added this bit to the beginning of the digitizer assembly code (But, I think it could have been in some other cog code, doesn't need to be there.):
'Init ADC input for testing analog input
pgm_scp wrpin .scpmode,#3<<6+scp_base 'init ADC/scope pins
wxpin .scp_x,#3<<6+scp_base
dirh #3<<6+scp_base
JMP #MainLoop
CON scp_base = 8'52 'must be a multiple of 4, 1st pin is level-triggered input
trigger_level = $90 'scope trigger level
arm_level = $70 'scope arm level
scope_filter = 0 'scope filter: 0 = 68-tap, 1 = 45-tap, 2 = 28-tap
DAT
.scpmode long %0000_0000_000_100011_0000000_00_11010_0 'ADC/scope mode
.scp_x long (trigger_level & $FC)<<8 + (arm_level & $FC) + scope_filter
DAT 'aquisition loop
MainLoop
This turns pins 8..11 into ADC input puts using smartpin scope mode. But, I'm not actually using the special scope instruction, GETSCP, I'm just doing RQPIN to get the latest data.
I think this all means I can use the regular ADC input smartpin M mode, %11010. (Except for the analog trigger pin, that one has to be in scope mode)
This seems to do something but I think I have to figure out what to set X to now.
Also, this complicates trigger and input levels as I think it's no longer limited to 8 bits (if I'm seeing it right).
Actually, doesn't look like I can use regular ADC input mode. At least, I haven't figured it out yet. But, I do seem to be able to use the P field do increase ADC sensitivity
Yes, changing the P field does seem to allow me to adjust the vertical gain.
I dialed down the DDS sine wave amplitude from 127 to 10.
Then, see attached for how the top trace gets bigger with bigger gains.
Gains values are 1X, 3.16X, 10X, 31.6X, 100X
Guess I'm obligated to add a vertical gain setting on the two analog plots.
I added in text display of the analog channels vertical data.
I'm not sure why, but the ADC scope of DDS output does not range from 0 to 255 as I thought it would, but more like 43 to 207..
its because the ADC can ready above and below the rails, and has a ~5v span. So the DAC output span is 3v3 but ADC 5V
When using 16 bit accumulations we see about 11000...54000 as the result, for GIO ... VIO (3v3) range. This corresponds to the values you report, when you divide by 256.
Note that the 11000 (GIO) and 54000 (VIO) value vary from pin to pin (and chip to chip), however the span is more consistent ... so if you're seeing 10000 for GIO you might see 53000 for VIO
One quick cheat is to take more samples than you need, eg take 388 samples, which covers the -0.85 to 4.15v full range, then subtract 66 (0.85v) from the result, to get 256 levels
I don't think scope mode in smartpin gives you any parameters in that regard. But, what you say makes sense.
I thought there was something about scope mode doing automatic VIO and GND basing. Is that not there? Or, can I assume some pin to pin variance?
I was just thinking that it might be nice if new Eval boards could include a few jumpers so that people could try ADC out on neighboring pins.
Should be more or less safe now that 5V on I/O headers needs a jumper move to activate, right?
Was looking to see if any accessory board could do this, but didn't see any clean way... Maybe an 3.5 mm audio cable jumper from audio out to headphone in might do it though...
I added smartpin (SP) settings buttons for each of the channels and the trigger. This is convenient for playing around with several smartpin settings at the same time without having to reenter everything when switching back and forth.
Also added in vertical gain knobs for the vertical channels.
The VGA pins also moved so can look at analog VGA signals via smartpins.
Thanks. I added a black outline to the dials. Think that is slightly better.
Going to declare victory now and move on... Maybe later on I'll circle back and add in some DDS controls.
Going to post the source in the 2-bit GUI thread...
Comments
297 MHz clock gives 67.3 ns per point
The vertical markers are 16 points apart. 10 between peaks is 160 points or 10.7 us.
1/that is 92 kHz. Uh Oh... Need to work on the math some more...
This pointed an error in my clocks/loop calculation...
Changed the bottom of the loop like this and now all good:
I've updated the binary in the top post.
BTW: Since it captures both INA and INB at every point, you can actually change the digital pin number in "Single" mode after a trigger and see what is on any other pins.
Now, I just want to add some DDS controls and then I think I'll declare victory and move on to something else...
For testing, I added this bit to the beginning of the digitizer assembly code (But, I think it could have been in some other cog code, doesn't need to be there.):
This turns pins 8..11 into ADC input puts using smartpin scope mode. But, I'm not actually using the special scope instruction, GETSCP, I'm just doing RQPIN to get the latest data.
I think this all means I can use the regular ADC input smartpin M mode, %11010. (Except for the analog trigger pin, that one has to be in scope mode)
This seems to do something but I think I have to figure out what to set X to now.
Also, this complicates trigger and input levels as I think it's no longer limited to 8 bits (if I'm seeing it right).
Actually, doesn't look like I can use regular ADC input mode. At least, I haven't figured it out yet. But, I do seem to be able to use the P field do increase ADC sensitivity
I dialed down the DDS sine wave amplitude from 127 to 10.
Then, see attached for how the top trace gets bigger with bigger gains.
Gains values are 1X, 3.16X, 10X, 31.6X, 100X
Guess I'm obligated to add a vertical gain setting on the two analog plots.
How much memory is this taking now? How much source code vs object code vs variable space?
Fastspin doesn't seem to provide a breakdown, but the graphics buffers for plotting are the biggest part. They add up to 172 kB.
That means your code size is 237KB. That's a big program.
How big is your source code?
Form Data File #1: 2,136 lines
Form Data File #2: 1,499 lines
VGA driver file: 2,686 lines
Digitizer file: 321 lines
DDS file: 87 lines
There's also the USB, graphics, and stdio files...
So, it's fairly big..
Still, I think most of it is various buffers and data, not code per se...
I'm not sure why, but the ADC scope of DDS output does not range from 0 to 255 as I thought it would, but more like 43 to 207..
When using 16 bit accumulations we see about 11000...54000 as the result, for GIO ... VIO (3v3) range. This corresponds to the values you report, when you divide by 256.
Note that the 11000 (GIO) and 54000 (VIO) value vary from pin to pin (and chip to chip), however the span is more consistent ... so if you're seeing 10000 for GIO you might see 53000 for VIO
One quick cheat is to take more samples than you need, eg take 388 samples, which covers the -0.85 to 4.15v full range, then subtract 66 (0.85v) from the result, to get 256 levels
I thought there was something about scope mode doing automatic VIO and GND basing. Is that not there? Or, can I assume some pin to pin variance?
Should be more or less safe now that 5V on I/O headers needs a jumper move to activate, right?
Was looking to see if any accessory board could do this, but didn't see any clean way... Maybe an 3.5 mm audio cable jumper from audio out to headphone in might do it though...
Also added in vertical gain knobs for the vertical channels.
The VGA pins also moved so can look at analog VGA signals via smartpins.
Updated top post with binary and pics.
Going to declare victory now and move on... Maybe later on I'll circle back and add in some DDS controls.
Going to post the source in the 2-bit GUI thread...
1080p 2bit tiled GUI thread....
Somebody was asking me....