TESTB and Z flag
ManAtWork
Posts: 2,176
in Propeller 2
I just found out that TESTB* instructions set the Z flag the opposite way than I expected. In P1 assembler the Z flag was always set if the result of a calculation/comparison or logical operation was zero and cleared otherwise. Although we could call such behaviour "inverted" and somewhat more complicated we are all used to it. The TESTB instructions do it just the other way and set the Z flag if the bit was set (NOT zero). If you read the documentation carefully (I haven't) you probably interpret it the right way but it's not obvoius.
Is there some rule to which instruction sets the Z flag in which way so we can remember it easier or are the TESTB + TESTP instructions the only exception to the rule (Z means zero)?
No big problem.... I think we just need a bit more verbose documentation.
Is there some rule to which instruction sets the Z flag in which way so we can remember it easier or are the TESTB + TESTP instructions the only exception to the rule (Z means zero)?
No big problem.... I think we just need a bit more verbose documentation.
Comments
The bit instructions do the reverse to other instructions. They copy the desired bit into the flags. Of course Z is usually the opposite (inverted).
A simple fix is possible by swapping the TESTB and BIT instructions with TESTBN and BITN instructions by renaming them with no hardware change necessary but that’s not going to happen.
TESTB/TESTBN and TESTP/TESTPN can use either C or Z flag as accumulator for bit operations (Write=load / AND / OR / XOR).
Write (load) operation copies the selected bit into the accumulator (C or Z).
This means that Z flag's value will be the opposite of the expected value for other instructions:
WZ when the selected bit is zero results in Z=0 (instead of the usual Z=1).
We have logical instructions for a 1-bit CPU --- actually two such CPUs available simultaneously:
one using C flag as accumulator,
another one using Z flag as accumulator.