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smart pins and events — Parallax Forums

smart pins and events

Today I tried talking to an absolute encoder of a servo motor from Sanyo Denki. It has a rather strange protocol, an asynchronous serial RS485 line (bi-directional half duplex) but with 16 bit frames instead of 8 and a CRC3 for sending and CRC8 for receiving with non-standard polynomials. So it's a good test for the capabilities of the P2.

Everything went surprisingly well and I got answers from the encoder on the fist go. However, I've noticed that the received words were somhow shifted. I got the first data word in place of the second, the second in the third and the first (status) contained garbage. I found out that the first WAITSE didn't work and fell through immediately. So I tried out some things and found out that the IN bit of the smartpin seems not to be reset by a DIR=0. If I insert an AKPIN and a POLLSE the WAITSE works as expected.
		drvl    #pinEncTe
		fltl	#pinEncTx		' reset smartpin
		wrpin	mode_stx,#pinEncTx	' synchronous serial transmit
		wxpin	baud_bits,#pinEncTx	' 2.5MBd 16N1
		drvl	#pinEncTx		' enable TX smartpin

		fltl	#pinEncRx		' reset smartpin
		wrpin	mode_srx,#pinEncRx	' synchronous serial receive
		wxpin	baud_bits,#pinEncRx	' 2.5MBd 16N1
		' don't enable RX smartpin, it'd read TX data (loopback)

		setse2	#%001_000000 + pinEncRx ' IN rises
txLoop
		drvh	#pinEncTe
		waitx	bitTime			' output enable delay
		wypin	cmdCDF1,#pinEncTx	' start transmission
		waitx	bitTime			' busy flag is not valid before start bit out
.busy		rqpin	rxd,#pinEncTx wc	' read busy flag -> C
	if_c	jmp	#.busy			' wait for TX complete
		waitx	bitTime
		drvl	#pinEncTe
		drvl	#pinEncRx		' enable RX smartpin
		akpin   #pinEncRx		' force IN low
		pollse2				' purge false event

		waitse2
		rdpin	status,#pinEncRx
		shr	status,#16

		waitse2
		rdpin	pos,#pinEncRx		' receive pos LSW
		shr	pos,#16

		waitse2
		rdpin	rxd,#pinEncRx		' receive pos MSB + CRC
		shr	rxd,#16

		and	rxd,#$FF
		shl	rxd,#16
		or	pos,rxd			' merge MSB+LSW to 24 bits

		getct	time	
		setq	#2
		wrlong  pos,ptra		' write pos + time
		waitx	cycleTime
		jmp     #txLoop

' 			%AAAA_BBBB_FFF_PPPPPPPPPPPPP_TT_MMMMM_0
mode_stx	long	%0000_0000_000_0000000000000_01_11110_0 
mode_srx	long	%0000_0000_000_0000000000000_00_11111_0
baud_bits	long	$10000*72 + 15 ' 2.5MBd 16N1
'			 CRC  CC    EA FC  SC   
cmdCDF1       	long    %100_00001_000_00_010
cycleTime	long	18000 ' 1ms
bitTime		long	72

pos		long	0
time		long	0
errCnt		long	0

rxd		res	1
status		res	1
And BTW, the busy flag for sending is also undefined directly after starting a transmission. I have to wait some time before polling it, otherwise the busy flag polling loop is terminated immediately.

Is this normal behaviour or have I done something wrong? No big problem but I think it should be documented.

Comments

  • evanhevanh Posts: 15,916
    Yeah, just the way it is I presume. The opposite problem of needing a pre-trigger also exists with other modes.

    If you place the SETSE2 after the AKPIN then the POLLSE2 can probably be removed.

  • cgraceycgracey Posts: 14,155
    There are multi-cycle delays on incoming signals and outgoing signals. If something weird is happening, try a NOP or WAITX #1..3 instruction.
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