Full Duplex Serial P2
SaucySoliton
Posts: 521
in Propeller 2
Has this popular P1 object been ported to P2 yet? I just wanted to ask before porting it myself.
Comments
https://forums.parallax.com/discussion/170101/fullduplexserial2-spin-for-use-with-fastspin-and-the-p2#latest
I did FullDuplexSerial2 providing two Ports with Buffers in LUT and self contained as PASM object, @RossH uses it also in Catalina.
FullDuplexSerial2.Spin provides the usual Spin Routines alike FastSpins Driver do and offers asyncron block/string transfers and a simple strIn function also.
I need to get Eric to provide it together with FlexGui/FastSpin it seems to be stable.
Mike
I got this one to work. Thanks!
The basic idea is to have 2 ports with 512 bytes buffer each direction in one COG without using HUB ram except a couple of longs for a mailbox
Mike
They don't, at least not on the risc-v COG. Are you using riscv-p2? Or micropython? If it's just a serial driver that you want then using another COG probably is a good solution for those environments.
Ah, interesting, I didn't know anyone else was using riscv-p2 . Generally spin2cpp should be able to convert .spin code into something that riscv-p2 can digest. If you have any trouble or questions please let me know!
True, but remember the main use for this is as a timestamp in milliseconds whereas you have to fudge 64-bits otherwise and besides its the timeout counters that are useful I find, I even assign an alarm vector to these so that in say 120ms when it times out without being retriggered, then it will execute the alarm vector if set. Don't miss the point of what I'm suggesting is that mainly a cog dedicated to one serial port is a sad cog indeed. Make it happy and useful instead.
Yes, the TX buffer is less important, and RX needs the most attention. (in UB3 I made Tx buffer 256 bytes and Rx 1536, to use all available XRAM in that part).
TX tends to self-pace, and will add more stop bits if the SW is just a bit slower. RX without handshake is less tolerant, so the RX timing needs to manage full packed streams.
12Mbd is a common upper baud limit, and sometimes 2 stop bits are needed. (UB3 seems to work at 8Md and 12Mbd, with 8.n.2 settings, and 6Mbd and lower are ok with 8.n.1)
The is a use case for some modest Tx buffering, and that is to allow the upstream host (another COG in P2) to finish any short burst earlier.
ie it can fill a buffer faster than the link can empty it, so that gives more CPU cycles to the user.
Long sustained transmits are still essentially link speed determined.
Another question with libraries, is whether to support HW handshake ?
That needs more pins, but can work well if a design is unsure how much response delay will occur.
I've never had to use hw handshake ever, and I was never tempted to either. Should we implement a Centronics port too?
While the multi serial port cog can be very easy to implement, what we probably want to do is agree upon the software interface. Should we use mailboxes perhaps? That way all the buffering is looked after by the cog and the cog appears as a standard peripheral with hub memory as registers so that it is language agnostic.
Yes, that is what FullDuplexSerial2 does. I was original inspired by JDserial(?) because it had a self contained PASM COG, once started it just needed two longs in HUB and you could reuse the HUB ram.
Usable from PASM and SPIN.
So that was my goal for FullDuplexSerial2. Just PASM and Buffer in the LUT. Simple Mailbox interface for each port.
It supports async execution, so you can read or write, say a string or a block of bytes from/to HUB without waiting for it, just write two longs and do whatever you have to do next.
Same with my plan to hijack TAQOZ in ROM. Switch it to Mailbox and it is Language Agnostic. Just another serial port software-wise, and well - yes - it needs the lower 64k, but FastSpin can handle that issue.
And also yes, without LUT buffering one COG can run a lot of serial ports, I might try that out...
Mike