Getting closer with my P2 boards...
Cluso99
Posts: 18,069
I see some time from work looming 
I have my pcb base layout started many months ago. So here is what it/they will be...
A 1”x1” (25.4x25.4mm) 2 layer pcb with 0.050” (1.27mm) pitch pads around the edge in a 20x20 arrangement and will take the 1.27mm pitch pin headers or sockets. The pcb will have...
* P2X8C4M64P (did I get the pn correct? and obviously included)
* 20MHz Xtal
* Bypass caps
* Transistor reset circuit and link to enable/ bypass it, plus reset pin pull-up.
Yes, that’s it. No regulator, no Flash. It’s designed to plug into a base board or whatever.
The second board will be similar to the above (1”x~1.5”) - will be longer instead of the top row of pins, and it will have a microSD socket and regulators. I will be using LDOs (not switching regulators). There will be header pins for a cheapie CP2102 USB-Serial ~$1.25 which will also provide 5V.
I will be doing an add-on board for VGA and Keyboard (PS2 or USB) connections.
It’s MHO that for many designs, power requirements will well under 500 mA and the cost of switchers is not required. For that reason, massive heat sinking is not required either.
I have my pcb base layout started many months ago. So here is what it/they will be...
A 1”x1” (25.4x25.4mm) 2 layer pcb with 0.050” (1.27mm) pitch pads around the edge in a 20x20 arrangement and will take the 1.27mm pitch pin headers or sockets. The pcb will have...
* P2X8C4M64P (did I get the pn correct? and obviously included)
* 20MHz Xtal
* Bypass caps
* Transistor reset circuit and link to enable/ bypass it, plus reset pin pull-up.
Yes, that’s it. No regulator, no Flash. It’s designed to plug into a base board or whatever.
The second board will be similar to the above (1”x~1.5”) - will be longer instead of the top row of pins, and it will have a microSD socket and regulators. I will be using LDOs (not switching regulators). There will be header pins for a cheapie CP2102 USB-Serial ~$1.25 which will also provide 5V.
I will be doing an add-on board for VGA and Keyboard (PS2 or USB) connections.
It’s MHO that for many designs, power requirements will well under 500 mA and the cost of switchers is not required. For that reason, massive heat sinking is not required either.
Comments
I think what you are saying is all I need is to design a board to hold a bunch of your modules and I am off to the races?
When?
and a Reset CAP ? , so the P2 at least nominally resets on power rise ?
No regulators and no flash mean this does not work at all, until the user adds those correctly.
There should be room in the corners to fit modest LDOs, to at least get an 'easily working' platform ?
I like the NCP187AMT330TAG, in 2x2 QFN so it cools well, but still small enough to fit 'in the corners' of the P2 package - and they have POR, for 21c/3k
For 1v8 the Automotive NCV8187AMT180TAG is same package, for a few cents more.
Flash is more 50/50 but they can come quite small ?
eg lcsc have 2x3 package of PUYA-P25Q32H-UXH at 17c/100
Those are easily made optional.
Sorry but I’m not opening up the design for discussion.
Basically, with all 64 I/O brought out, there isn’t much else that fits in 1” square. I have all the I/O tracks laid including the xtal.
Just left to route the power and decoupling. It’s been that way for a few weeks now but I’ve been extremely busy at work programming in python
There are 0.05” pitch pads around the pcb edge in a 20x20 grid for a total of 76 connections.
I used 0603 decoupling caps because I needed to route between the caps and 0402 doesn’t permit this. There is an 0603 decoupling cap on every VIO and Vcore pin, plus an extra 0603 bulk MLCC cap for every 4 banks of VIO and Vcore. All these are on the underside of the pcb.
I’ve used a 2016 20MHz xtal on the topside.
Also on the topside is an 0402 10K pull-up on the P2 Reset pin, and an 0402 10nF/100nF (TBD) on the Reset Pad. On the underside is a pre-biased NPN transistor (as I use in P1) connected to the P2 Reset pin. There is a 3-way set of visa to select either the transistor reset or bypass (as I do on my P1 boards). IMHO a number of these reset issues with P2 might be resolved if the transistor reset (as usedon the P1 PropPlug) was used on the P2. When the transistor reset is used, the reset occurs when DTR is dropped. This overcomes a problem of Windows dropping DTR (causing a P1/P2 Reset) when switching applications. This was really difficult to route in such a tiny board.
There are NO voltage regulators on this board. The user will supply the 1V8 and 3V3 necessary via the outer pads.
Now I have to recast the power and ground planes, and do a final verification. And of course order parts
Then I can work on the second board that will incorporate uSD, Serial, and Power Supply.
About DTR... are you aware that Windows behaviour can be configured to stop pulsing those extra DTR pulses? I posted some screengrabs somewhere; think it's in device mgr/ com port / settings. Additionally the FTDI chip can invert the DTR signal behaviour. Could be a combination of settings that works for you.
Might help your experience with the eval, if that was bothering you thus far.
The problem with Windows is that it disables DTR between programs. So, if you run for example PropTool, and then switch to PST, then DTR will get disabled and you will get a prop reset pulse when switching. I believe Chip found this out with P1 and that's why the PropPlug uses the transistor reset circuit.
Users don't want to reconfigure Windows because it can break something else.
@"Peter Jakacki" EFM chip - Agreed! We almost used that a couple times, but I couldn't find the fully elaborated source code to test and implement within release deadlines. The mfg site has some sample pieces, so I might pull those together and create a working demo before the next pcb rev. It's just a matter of time.
Happy to see you got that going on P2D2. Hope you get a well earned massage and Christmas break after assembling all those boards.
The problem occurs when you switch between programs where the former program has DTR ON. Windows turns it off as it switches apps.
I am unsure what actually happens to the USB controlled DTR by Windows. It may work correctly.
The transistor and associated capacitor causes a reset pulse to be generated only when DTR goes active (ie goes from +V to 0V), but not when DTR goes inactive (ie goes from 0V to +V).
Windows "glitches" the DTR when switching between programs that both have DTR ON. It also drops DTR when switching between a program that has DTR ON to a program that has DTR OFF.
There is no "glitch" if DTR is OFF on the program being switched out.
From what I recall when I looked into this many years ago, I think PropTool pulses DTR ON then back OFF again to cause a reset. Then Windows can safely switch to PST without DTR glitching because it remains OFF.
Anyway, I understood it back then and realised that the transistor was indeed required, so it's on my boards as a linkable option.
Plus moved a lot of code into Assembler routines, where it can run faster, and increased the buffers to the Max the chip can accommodate.
Surprisingly, it seems to work ok even at 8MBd and 12MBd in 8.n.2 on Rx, and P2 can send bursts up to 1536 bytes, which should be useful for future P2 Debuggers.
The EFM8 generates a reset pulse on the leading edge of DTR, and that does not fire on windows disconnect/reconnect.
It also loads Si5351 default register set, on power up, to allow easy coverage of almost any clock-in.