loadp2 problems
Peter Jakacki
Posts: 10,193
in Propeller 2
For some reason I can't seem to use my versions of loadp2 on Linux with the revB silicon as it comes up with "Unknown version G".
But downloading a fresh source and building also has an error:
But downloading a fresh source and building also has an error:
peter@peter-XPS-15-9550:~/Downloads/loadp2-master$ ./build_linux loadp2.c:63:10: fatal error: MainLoader.h: No such file or directory #include "MainLoader.h" ^~~~~~~~~~~~~~ compilation terminated.Maybe I need a coffee.
Comments
Maybe I need another coffee
Has something changed with loadp2 as it used to build?
I used the source from https://github.com/totalspectrum/loadp2
Works for both those C compiles and my pasm work.
EDIT: Or you can just throw a copy of fastspin in /usr/local/bin or something.
EDIT2: Huh, /usr/local/* is almost entirely empty in Ubuntu 18.04. I know little about organising the OS but presume they've been making changes to depreciate the use of that path. /usr/bin is always there I guess.
The thing is I never had problems with loadp2 before, it just worked.
EDIT: muddle head has worked through it and I forced it to -SINGLE (I'm working with a non-standard 22.222MHz input while testing)
Confirming p2 response as Prop_Ver G plus it enters TAQOZ etc
The other thing is while it is not a big thing to sort through this, it is just hat if I spend time on getting tools to work, then there is less time I can spend on getting my software and hardware to work.
Here's some more output:
I'm curious about the "incorrect initial checksum" error you're getting, because @"David Betz" is also seeing that on his Mac. There may be a timing bug of some sort. Does reducing the loading speed to, say, 230400 baud with the "-l230400" option make this go away?
loadp2 seemed to work with -SINGLE so I will check this out more later.
EDIT: really seems to be a problem with the fast loader
Here's a manual reset and preset parameters
I thought the -f would override that but I also tried it with out the -CHIP and it seems to default back again:
and patching in the actual clock mode etc and I guess now that -f specifies the final frequency rather than the oscillator.
So success with fast loader and the change to setting this as the default caused the problem which is why I had to use -SINGLE unless I specified the parameters
The original fast loader used bit-banging to read the bytes, so it needed to run at a reasonably high frequency. But the new fast loader is using the smart pins, so actually it makes sense for the loader to stay in RCFAST mode. The only drawback there is that RCFAST isn't at a known frequency, so we'll probably have to autobaud again to figure out the smart pin settings. Unless the ROM stores the information somewhere? That would be nice if it does, I'll have to look at the listing to check.
Looks like Peter has it all under control now. No need to do autobaud really. But, if you're keen, I guess no-one will complain.
TAQOZ and the monitor use the smart pins that are already set, but it is available when either are called.
Anyway, just check chips listing at the autobaud section.
P2EVAL used 20MHz
Forget which one used a xtal and which used an osc
P2EVAL2 is using 20MHz
P2D2R2 is using 26MHz??? switches to 20MHz???
Think I will use 20MHz xtal either 10pF or 20pF. The P2 only has options for 15pF or 30pF so the actual freq will be some ppm off which will be irrelevant since the xtal may only be 10-50ppm anyway. Unlike jmg, I’m not trying to get to 1ppm.
Close - the P2 Clock frequency is set by EFM8UB3 to be 20.00MHz on Si5351A CLK1 pin.
Currently, at power up Si5351A inits & resets P2 concurrently, and I've mapped DTR _/= -> Reset P2 and RTS _/= -> reloads Si5351A from table
The physically fitted Crystal/Osc frequency is what the Si5351A sees, and here 26MHz is a sensible choice, as it covers very low cost GPS oscillators.
Autobaud again is a good idea, as the RCFAST can drift as the P2 warms up. The ROM has a high quality AutoBaud, not sure if that can be called again ?
Another drawback of RCFAST is the division to baud is not large, so granularity is coarse.
EFM8UB3 can set to Baud values above 3MBd (anything 24M/N is valid, N >= 2), at higher rates USB pipe & SW delays is limiting factor, but for loaders, P2 takes data as fast as it can.
It is possible users may use P2 with FT232H parts, and those can stream gapless at 12MBd, so the P2 loader should be able to define PLL settings that allow P2 to keep up, and keep Baud exact.
Does anyone know what SysCLK P2 needs to load at 12MBd ? (for the SW to keep up? - I'd guess 120MHz is OK ?)
With the EFM8 there is no problems at all as on the P2D2 it have direct access to the Flash/SD thus it is able to update the image stored there without engaging the P2 that could wait in reset.
BTW @"Peter Jakacki" I think you have an error on the latest P2D2r3 schematic near P2 pins 1 and 2. It seems that VDD goes shorted to GND.