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Investigating Prop2 DAC performance — Parallax Forums

Investigating Prop2 DAC performance

Mark_TMark_T Posts: 1,981
edited 2019-03-02 00:30 in Propeller 2
Thought I'd share a few spectra I've been getting since connecting a Prop2 smartpin in random dithered DAC mode to
an ADS8885 18 bit SAR ADC.

The main conclusions are that the switchmode 3.3V supply isn't suitable for audio (no surprise there), and that its pretty soft
at audio frequencies (not regulating well), due to the low power operation with no other loads. You get modulation of audio
bandwidth signals from the DAC pin showing up as sidebands a few kHz either side that vary a lot with temperature.

The intermodulation distortion from the DAC pin at standard drive levels is about -70 dB.

Loading the DAC reduces IM distortion somewhat (presumably due to lower voltage excursion) - I have tried both 500 ohm
AC coupled load and 5k AC coupled load, the loading with 500 ohms notably reduces amplitude but slightly improves IM
performance.

Disclaimer: The ADC circuit is pretty primitive with rudimentary reference voltage (blue LED+capacitor), and no buffering
on the inputs. The ADC circuit is powered directly from one of the VIO pins, either connected to linear or switch mode.

5k load, linear regulator for DAC pin and for ADC circuit (separate pin group), two tones about 11.2 and 11.8kHz, 0.5V rms
or so (the top of screen is nominally about 3.5Vrms)
P1010331.JPG

With heavier load the amplitude goes down (scale is 10dB per division, 1.25kHz/division):
P1010330.JPG

With both DAC and ADC on switch mode supply we see modulation effects around the tones
P1010325.JPG

After the board warms up the modulation effects reduce in intensity:
P1010327.JPG


With one powered by linear regular, other by switch mode, the spurious signals are larger as the rails
are different, which ever way round we configure the linear/switch mode:
P1010328.JPG
P1010329.JPG

Comments

  • Mark_TMark_T Posts: 1,981
    edited 2019-03-02 00:34
    Note in the first spectrum, all linear regulators, there is still breakthrough of the 5V switchmode regulator, the
    small rectangular hump about 1/3 or the way along.

    I'm sampling at 160kSPS with the ADS8885, and summing 4 samples at a time for an effective Fs = 40kHz

    I'm fairly sure the nice flat noise floor is the random dither, its just too flat to have an analog cause.

    [ And I forgot to say using a hanning window to keep the noise floor as low as possible, which is why the
    peaks are slightly different in shape and broad ]
  • Interestingly using PWM dither rather than random dither raises the noise floor of the DAC by about 8dB
    Of course this may be frequency dependent, I'm currently outputing a DAC sample every 32 clocks (sys clock
    160MHz, so 5MSPS)

    Compare this PWM dithered spectrum to first (random dither) spectrum in the initial post:
    P1010332.JPG
  • evanhevanh Posts: 15,915
    Mark_T wrote: »
    ... I'm currently outputing a DAC sample every 32 clocks (sys clock
    160MHz, so 5MSPS)
    Interpreting such data is beyond my knowledge ... but smartpin mode %00011 (DAC+PWM) will be nerf'd due to not using a multiple of 256 clocks per sample.
  • Doesn't seem to make any difference to the noise floor, presumably there's the same energy involved.
    About 8dB worse for the PWM compared to random. Presumably that' because the PWM energy is band-
    limited whereas random dither energy is spread thinly all the way to 80MHz as the DAC dither runs at
    full clock speed?

    Strikes me there's no reason to ever use PWM dither, and several not to... But its a single test in less
    that perfect circumstances I admit.

    The noise floor when outputing all zeroes drops about 5dB for the random dither if outputting all
    zeroes, and falls 13dB in PWM dither mode - ie there is no dither outputting zero, so the two
    modes become equivalent (about 95 dB below the full scale sine signal)

    Outputting a multiple of 256 has the same property as the lower byte is what drives the dithering.
    This means with slowly changing DC output values from the DAC the noise amplitude will vary
    as the 16bit value scans past multiple of 256. This might be an issue in some fairly obscure
    scenario, such as generating a reference voltage.

    Of course all these noise values are dependent on the window and sample size used, which is hanning
    and 2048 point at 40kSPS rate. To convert to dB per sqrt Hz you'd have to apply the relevant equation,
    and I'd have to calibrate the sensitivity of my ADC setup and improve anti-aliasing too.

    I'm currently interested in relative behaviour of the modes, distortion, spurs etc.

    I would estimate the behaviour as roughly equivalent to 12 bits, the intermodulation is commensurate
    with that and the odd-order harmonics are stronger than even order.
  • jmgjmg Posts: 15,173
    edited 2019-03-02 19:18
    Mark_T wrote: »
    Strikes me there's no reason to ever use PWM dither, and several not to... But its a single test in less
    that perfect circumstances I admit.

    Won't PWM dither give you better DC control ?
    ( I wonder how rate-multiplier dither would have worked, that has higher modulation rates than PWM )

    Random could be better for Audio ?

    How exactly does the random mode make the LSB decisions - it cannot be truly random, as it must have some structure on duty and some limits on period ?
    Mark_T wrote: »
    The noise floor when outputing all zeroes drops about 5dB for the random dither if outputting all
    zeroes, and falls 13dB in PWM dither mode - ie there is no dither outputting zero, so the two
    modes become equivalent (about 95 dB below the full scale sine signal)
    What about outputting exactly half-scale ? (LSB all zero, all bits zero except MSB That could be a useful Audio mute/idle point, to avoid clicks / pops.
    Mark_T wrote: »
    I'm currently interested in relative behaviour of the modes, distortion, spurs etc.

    I would estimate the behaviour as roughly equivalent to 12 bits, the intermodulation is commensurate
    with that and the odd-order harmonics are stronger than even order.

    That's looking quite good.
    Does it vary much from pin to pin, and how much cross-talk do you see, adjacent pins vs opposite sides pins ?

  • Mark_TMark_T Posts: 1,981
    edited 2019-03-02 20:36
    Won't PWM dither give you better DC control ?
    Well I looked at several different DC levels, both multiples of 256 and not, and yes, for a DC level
    PWM has no noise at low frequencies. Once there's an AC waveform though the PWM intermodulates
    onto the quantization noise and the noise floor jumps up.

    I'm pretty sure the random mode adds a random byte to the 16 bit value and truncates to the top 8 bits,
    which accounts for multiples of 256 being clean for random dither (but not values halfway inbetween)
    Does it vary much from pin to pin, and how much cross-talk do you see, adjacent pins vs opposite sides pins ?
    I've not investigated this next, I guess that's next - put two different tones on two adjacent pins and look
    for crosstalk, ditto when on separate pin groups.

    [ update - cross talk on adjacent pins is down in the "fur" of the noise floor, can discern the peaks only if
    you know which frequency to look at, so that's quite nice - same pin group, same linear regulator ]
  • jmgjmg Posts: 15,173
    Mark_T wrote: »
    I'm pretty sure the random mode adds a random byte to the 16 bit value and truncates to the top 8 bits,
    which accounts for multiples of 256 being clean for random dither (but not values halfway inbetween)
    It still need to deliver an exact average value tho, so 'random' word here may be loosely applied.
    Maybe it is closer to the NCO pulse Density Modulation, which is quite similar in results to a Rate Multiplier.
    ie if you want 128/256, using pwm is hi for 128 then low for 128, but RateMultiplier/PDM is hi.lo alternately.

  • evanhevanh Posts: 15,915
    edited 2019-03-03 03:22
    It needs to continuously reference the 8-bit set value of the lower 8 bits of Y. I'd guess it's a straight arithmetic compare, every sysclock, against 8 bits of the free running PRNG.
  • evanhevanh Posts: 15,915
    Mark_T wrote: »
    Doesn't seem to make any difference to the noise floor, presumably there's the same energy involved.
    Ah, you probably aren't using IN to know when the buffer is ready for next sample. It's a double buffer arrangement, which is not noticeable when period is set to one.
    '-------------------------------------
    'DAC with PWM dither
    setdacmode
    		fltl	#dacpin
    		wrpin	#%00011_0, #dacpin		'8-bit DAC + 8-bit PWM dither
    		wxpin	#$100, #dacpin			'multiple of 256 sysclocks
    		wypin	#0, #dacpin			'initial level of zero
    		dirh	#dacpin
    
    		...
    
    sampleout
    		testp	#dacpin			wz
    if_z		wypin	dacsample, #dacpin
    if_z		ret				wcz
    		jmp	#sampleout
    
    
  • cgraceycgracey Posts: 14,152
    I have found that the PWM dither mode is superior to the random dither mode for audio. I was using the A/V add-on board for the P2 Eval board with headphones, listening to 1Hz full-amplitude sine waves. This reveals stepping noise. PWM was quiter and less quirky sounding.
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