Boot issue accessing SPI Flash after SD access
Peter Jakacki
Posts: 10,193
Starting a new thread for this particular problem - hopefully it won't get buried with guesses and question after question. We just need solutions from those who can test this out
I've noticed a problem in the past with trying to access the SPI Flash after the SD card has been initialized and read. It seems that the Flash doesn't respond, it just comes back with a constant high. Turns out that once the SD card has been initialized into SPI mode that the D0 pin stays enabled, and usually high because of the response code. Looking at P58 on the scope shows that the SPI Flash is responding and trying to pull P58 low but only as far as about half VIO. For the moment I've put a 22R in series with the SD data out to P58 as a workaround so that the SPI Flash can just override the high enough for it to work but 47R would be better and I should be able to use the series termination resistor I have in my P2D2 revision for this purpose.
There doesn't seem to be any command in the SD specs to disable the DO from the SD card although I have tried issuing extra clocks with and without the SD CE asserted along with its DI set high. It seems that as soon as it responds to the initial CMD0 that it makes DO a permanent output. Normally SPI chips always float their D0 pin once CE goes high.
To test this out on your P2 just put an SD card into your P2D2 without a boot file and then enter TAQOZ and type .SF (print Serial Flash) which will list the JEDEC and manufactuer IDs and serial number of the Flash chip. Without an SD card in there it will respond with something similar to this:
But if you leave the card in at boot it will return with FFs instead. However you can pull the card out and put it back in again and the SPI Flash will respond again. Do anything with the SD card or even 0 0 CMD a couple of times and it will lock the D0 pin up again.
Prior to my workaround:
I've noticed a problem in the past with trying to access the SPI Flash after the SD card has been initialized and read. It seems that the Flash doesn't respond, it just comes back with a constant high. Turns out that once the SD card has been initialized into SPI mode that the D0 pin stays enabled, and usually high because of the response code. Looking at P58 on the scope shows that the SPI Flash is responding and trying to pull P58 low but only as far as about half VIO. For the moment I've put a 22R in series with the SD data out to P58 as a workaround so that the SPI Flash can just override the high enough for it to work but 47R would be better and I should be able to use the series termination resistor I have in my P2D2 revision for this purpose.
There doesn't seem to be any command in the SD specs to disable the DO from the SD card although I have tried issuing extra clocks with and without the SD CE asserted along with its DI set high. It seems that as soon as it responds to the initial CMD0 that it makes DO a permanent output. Normally SPI chips always float their D0 pin once CE goes high.
To test this out on your P2 just put an SD card into your P2D2 without a boot file and then enter TAQOZ and type .SF (print Serial Flash) which will list the JEDEC and manufactuer IDs and serial number of the Flash chip. Without an SD card in there it will respond with something similar to this:
TAQOZ# .SF $EF40_1400 $270B_7025_$E666_5893 ok
But if you leave the card in at boot it will return with FFs instead. However you can pull the card out and put it back in again and the SPI Flash will respond again. Do anything with the SD card or even 0 0 CMD a couple of times and it will lock the D0 pin up again.
Prior to my workaround:
TAQOZ# 0 0 CMD . 255 ok TAQOZ# .SF $EF40_1400 $270B_7025_$E666_5893 ok TAQOZ# 0 0 CMD . 1 ok TAQOZ# .SF $FFFF_FFFF $FFFF_FFFF_$FFFF_FFFF okYou can see that the Flash still responded even after the first CMD0 but once the card responds then the Flash is overridden.
Comments
Here's where Andy suggests putting a 1K resistor in series:
http://forums.parallax.com/discussion/122588/ethernet-and-sd-card-on-same-spi-buss
Cluso says you can just give 16 clocks, but I don't think that always works:
https://forums.parallax.com/discussion/117409/sharing-sd-spi-pins-without-unmounting
He says Lonesock/rokicki also found a solution. Might want to see what they did, if you can find it...
I think it's best to just not share the SD bus, if possible...
Here's a tiny snippet of me clocking the SD while CE is active but of course I also had CE inactive as well.
I have series termination in SD lines so I am using that to isolate the SDDO from the SPIDO line but certainly a series resistor should be added at least with the best value to be determined although I am looking at a value of between 33 and 47R. If the value is too high then the SDDO would be filtered at higher speeds.
That might be the best way actually...
Perhaps that jumper would just move the SD MISO to a different P2 I/O pin..
It sounds like the SD card gets terminally hung up in output mode after being used in SPI mode. Is this so?
Nothing short of cycling its power pulls it out of this mode?
Seems like a tall order to expect the SPI DO to overcome such a pull-up. And this situation persists until the SD is unplugged.
It seems we would need a 220 Ohm resistor for the SPI flash to be able to reliably communicate after the SD card holds its DO high.
If the series resistor is a problem would adding a transistor that is enabled by the SD CE signal on the SD DO line be a practical solution?
How would the transistor be hooked up?
https://forums.parallax.com/discussion/117409/sharing-sd-spi-pins-without-unmounting
Thanks for finding that, Rayman.
It looks like Lonesock did something to get over this SD DO problem:
https://forums.parallax.com/discussion/comment/855848/#Comment_855848
Looks like it just deselects and sends some clocks:
Unless, maybe it has something to do with "multiblock mode"?
Yes, if the SD-DO cannot be disabled, then you will need some form of isolation resistor, of a suitable value.
220 Ohms and 10pF is a Tau of 2.2ns, but will add ~13mA of contention current. (Tau is time to 63% of Vcc, so is past the CMOS threshold within that time)
330 ohms is 3.3ns, and adds ~9mA of contention current
390 ohms is 3.9ns and adds ~ 8mA of contention current (etc, 470R is 4.7ns and 6.7mA)
What MHz do users expect SD cards to run up to ?
Another approach is a R//C, ( eg 1k//27pF) which allows higher resistors to be used, but the P2 sees a higher pin capacitance.
Is this the same effect, or is there something else to worry about too ? Even after reset, & CE=H, can SD card actively drive some pins ?
Does that make the config-resistors a lottery, brand and time dependent ?
https://electronics.stackexchange.com/questions/313361/what-is-preventing-using-a-can-bus-chip-and-sd-card-on-a-shared-spi-interface
which links to http://elm-chan.org/docs/mmc/mmc_e.html
and that claims (with waveforms) that a clock edge is needed after CS=H, to make float stick, but I think Peter has already done this ?
Hmm.. it looks like CS is not really always CS on SD cards, only once it is in SPI mode, is that pin CS, but in other modes it is CD/DAT3.
I see mention of DO becomes CMD I/O Command in and out
You might ask him about this...
The initial pre-caffein thought was source to DO, gate to CE, and drain to the P2 input pin, but a bit later I realized that would not work. No way for the SD data out signal to pull the line low. It really needs an analog switch unless D0 can be floated via software commands.
After searching the internet and looking at several blogs, forum posts, and articles the following link seemed to have the best description of how to access multiple devices on an SPI bus. The information provided there also agreed with information gleaned from the rest of the sites I visited.
http://elm-chan.org/docs/mmc/mmc_e.html see Consideration on Multi-slave Configuration
Peter and I discussed this yesterday evening when we discovered it.
I haven't had time to check my P1 code yet. It's solvable but I just need to check the sequence so we can ensure the ROM gets fixed for the next revision. BTW we can use code on the SD card to fix this if we need to. But first I need to work out the fix. I am working today so will not get to it today.
Currently you need to remove power for the SD to release DO but as I said I have fixed this in the SD drivers before to force the SD card to release DO.
If you have a pull-up on P59 then the boot ROM will not boot from SD and DO remains tristate.
That's why it taken a while to discover this.
Or you can check the boot ROM code source.
That's not quite covering David's specific question, which was an inserted but not-yet-touched SD card, was seen to be disturbing his SPI.
ie their power up state, is maybe not 100% reliable ?
What was the power supply & Vcc rise time on those circuits ?
How complex is that step, and can it be safely done before SPI Flash access, as a safety net ?
P2 could even check it can drive DO, with a light drive mode ?
@"David Betz" - once the card has been initialised after cmd0 etc it stays in spi mode, there is no such thing as putting it back into spi mode. The flash and sd that we have mixed on the same pins do work well as long as we can decouple the sd data out pin since it does not float after chip enable is deselected as we normally expect from spi bus chips.