How to switch a large-V load with a P-channel mosfet and small-V unipolar clock?
i can switch the supply voltage with a unipolar clock, if the clock has the same peak V as the source supply
![z1Ys3KL.jpg](https://i.imgur.com/z1Ys3KL.jpg)
but if i make the source V higher than the gate V, i get a flat line output.
![KJ2RoJo.jpg](https://i.imgur.com/KJ2RoJo.jpg)
How to switch a high-V load with a low-V gate, on a P-channel mosfet? Prefer single-stage
Thx
![z1Ys3KL.jpg](https://i.imgur.com/z1Ys3KL.jpg)
but if i make the source V higher than the gate V, i get a flat line output.
![KJ2RoJo.jpg](https://i.imgur.com/KJ2RoJo.jpg)
How to switch a high-V load with a low-V gate, on a P-channel mosfet? Prefer single-stage
Thx
Comments
https://electronics.stackexchange.com/questions/31594/mosfet-when-can-we-not-assume-that-the-gate-current-is-0
https://electronics.stackexchange.com/questions/35226/gate-current-direction-during-turn-on-of-p-channel-mosfet
How high is 'High-V' ?
See also this approach
Q2,Q3 are optional for speed improvement. Omit if you are not switching rapidly.
Notice you have a drive choice here : into the NPN base for Hi=ON, or you can connect base to MCU-Vcc, and drive low end of R1, for Lo=ON.
The emitter drive has benefits of
* MCUs that reset to light pullup, do not drive PFET during reset
* The ratio of R1:R2 defines the upper gate drive voltage, useful for high-V loads, to avoid damage of the P FET gate.
Some designs add a zener across the P-FET gate for even further insurance.
A down side, is at very low high-rail voltages, the gate drive is reduced. (eg a 5V gate drive, needs > 7.7V rail, with 3v3 on base.
Choose a NPN device with any gain, but ample voltage margin - 140V and even 300V NPNs are commonly available.