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Converting Spin P1 Interpreter to run on P2 — Parallax Forums

Converting Spin P1 Interpreter to run on P2

Cluso99Cluso99 Posts: 18,069
edited 2018-10-03 14:02 in Propeller 2
Just thought I'd give conversion a go for my Faster Spin P1 Interpreter.

Here are things I've found I need to fix/change just to get it to compile with pnut... 
'easy fix
'   labels :xxx --> .xxx
'   wc,wz/wz,wc --> wcz
'   movs/movd   --> sets/setd

' disable (will need further review)...
'   jmpret
'   jmp/tjz/djnz xxx wz/wc
'   movi
'   waitcnt/waitpeq/waitpne/waitvid
'   clkset/coginit/cogstop
'   locknew/lockset/lockclr/lockret
'   max/min
'   absneg/rev
'   ,par

Comments

  • Cluso99Cluso99 Posts: 18,069
    Progressed further on this tonight. There are a few other gotchas.

    To run compiled spin P1 code on P2 (which is the aim) I am going to need the low Hub to be the same as P1. i will fill in the clockfreq at hub $00000 (long) but the clockmode at $00004 (byte) needs to be looked at so I'll ignore it for now. I think the easiest way to start will be to load up the lower 64KB of Hub similar to P1 and P1V.

    I'll be using the same P1 limitations such as 8 cogs, 8 locks, 32 I/O (yes I know it was supposed to work for 64), Hub 64KB. I'll probably move my vector table from hub to LUT.
    Obviously we don't have the same counters as P1, and no WAITVID.

    What I am wanting to run is my Prop P1 OS on P2. This is mainly spin as is Kye's FAT32.
  • David BetzDavid Betz Posts: 14,516
    Cluso99 wrote: »
    Progressed further on this tonight. There are a few other gotchas.

    To run compiled spin P1 code on P2 (which is the aim) I am going to need the low Hub to be the same as P1. i will fill in the clockfreq at hub $00000 (long) but the clockmode at $00004 (byte) needs to be looked at so I'll ignore it for now. I think the easiest way to start will be to load up the lower 64KB of Hub similar to P1 and P1V.

    I'll be using the same P1 limitations such as 8 cogs, 8 locks, 32 I/O (yes I know it was supposed to work for 64), Hub 64KB. I'll probably move my vector table from hub to LUT.
    Obviously we don't have the same counters as P1, and no WAITVID.

    What I am wanting to run is my Prop P1 OS on P2. This is mainly spin as is Kye's FAT32.
    Have you tried compiling your OS with fastspin?
  • Cluso99Cluso99 Posts: 18,069
    David Betz wrote: »
    Cluso99 wrote: »
    Progressed further on this tonight. There are a few other gotchas.

    To run compiled spin P1 code on P2 (which is the aim) I am going to need the low Hub to be the same as P1. i will fill in the clockfreq at hub $00000 (long) but the clockmode at $00004 (byte) needs to be looked at so I'll ignore it for now. I think the easiest way to start will be to load up the lower 64KB of Hub similar to P1 and P1V.

    I'll be using the same P1 limitations such as 8 cogs, 8 locks, 32 I/O (yes I know it was supposed to work for 64), Hub 64KB. I'll probably move my vector table from hub to LUT.
    Obviously we don't have the same counters as P1, and no WAITVID.

    What I am wanting to run is my Prop P1 OS on P2. This is mainly spin as is Kye's FAT32.
    Have you tried compiling your OS with fastspin?
    David, no I haven't. I am not sure where to begin with that option. I have a mix of resident spin and PASM and I just load up a new file to run.

    I did think it would be nice to be able to run P1 compiled spin on P2. Of course there are a number of things it's not going to do, but thought I'd give it a go anyway.
  • David BetzDavid Betz Posts: 14,516
    Cluso99 wrote: »
    David Betz wrote: »
    Cluso99 wrote: »
    Progressed further on this tonight. There are a few other gotchas.

    To run compiled spin P1 code on P2 (which is the aim) I am going to need the low Hub to be the same as P1. i will fill in the clockfreq at hub $00000 (long) but the clockmode at $00004 (byte) needs to be looked at so I'll ignore it for now. I think the easiest way to start will be to load up the lower 64KB of Hub similar to P1 and P1V.

    I'll be using the same P1 limitations such as 8 cogs, 8 locks, 32 I/O (yes I know it was supposed to work for 64), Hub 64KB. I'll probably move my vector table from hub to LUT.
    Obviously we don't have the same counters as P1, and no WAITVID.

    What I am wanting to run is my Prop P1 OS on P2. This is mainly spin as is Kye's FAT32.
    Have you tried compiling your OS with fastspin?
    David, no I haven't. I am not sure where to begin with that option. I have a mix of resident spin and PASM and I just load up a new file to run.

    I did think it would be nice to be able to run P1 compiled spin on P2. Of course there are a number of things it's not going to do, but thought I'd give it a go anyway.
    I just thought it might be a faster path for you although I guess you'd have to modify the PASM code a lot to get it to work.

  • Cluso99Cluso99 Posts: 18,069
    edited 2018-10-03 15:29
    When it comes to porting P1 mixed Spin and PASM code I am just not sure of the best way to go.
    Guess it will come down to trying different ways to find the better approach.
  • David BetzDavid Betz Posts: 14,516
    Cluso99 wrote: »
    When it comes to porting P1 mixed Spin and PASM code I am just not sure of the best way to go.
    Guess it will come down to trying different ways to find the better approach.
    The good thing about enduring the pain of revising the PASM portions is that the result would be much faster and could make much better use of P2 than an emulated P1.
  • Dave HeinDave Hein Posts: 6,347
    edited 2018-10-03 22:44
    Cluso, you may want to look at p1spin. It's an unrolled implementation of the P1 Spin interpreter. The most frequently used bytecodes are run in cog RAM, and the rest are run in hub RAM.

    The P1 registers are remapped to the P2 values, and CNT is handled by some P2 code. When I detect that location zero is being read I just return a value of 50_000_000, which was the FPGA frequency at the time.
  • Cluso99Cluso99 Posts: 18,069
    edited 2018-10-04 02:12
    Currently I have been converting my Faster P1 Spin Interpreter that I used in P1V. I am fixing the P1 instruction to use P2 where necessary.

    Not doing any speed up with new P2 instructions yet, though I can see lots of little opportunities to do so :)

    My bytecode decoder uses a long per
    Bytecode which has 3 x 9bit call addresses and 5 special bits. So each bytecode has a possible 3 subroutines which can be common to other bytecodes.

    This conversion is at least giving me experience with pasm conversion and I am documenting this to put up on the forum for others. I want to get the whole FAT32 file support completed. Then I can convert the OS command files and we'll have an OS for P2 (not OS2 though ;) )

    I also need to look at other ways for converting P1 code, such as spin to pasm etc.
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