Prop2 ROM Development
cgracey
Posts: 14,152
Here's how we can develop the boot ROM...
In this .zip file are v32b 8-cog/64-smartpin/512KB-hub images for the Prop123-A9 and BeMicro-A9 FPGA boards:
https://drive.google.com/file/d/1P5y__g2cgpMmVlFYSQ5VGgd8mrrHEXxy/view?usp=sharing
They appear to the PNut_v32b.exe program as 1024KB-hub images, so that downloading can occur all the way up to $FFFFF. This is necessary for loading new ROM code into proper position.
Included is the current ROM file with a little header program which replaces the initial ROM contents:
In this .zip file are v32b 8-cog/64-smartpin/512KB-hub images for the Prop123-A9 and BeMicro-A9 FPGA boards:
https://drive.google.com/file/d/1P5y__g2cgpMmVlFYSQ5VGgd8mrrHEXxy/view?usp=sharing
They appear to the PNut_v32b.exe program as 1024KB-hub images, so that downloading can occur all the way up to $FFFFF. This is necessary for loading new ROM code into proper position.
Included is the current ROM file with a little header program which replaces the initial ROM contents:
' ' ' Load new ROM and wait for next reset ' dat org loc ptra,#$FC000 'ready to enter new data into rom .lp rdbyte byte_data,ptra++ 'get new rom byte setbyte rom_write,byte_data,#2 'install into command hubset rom_write 'do rom write command add rom_write,#1 'inc address in command djnz byte_count,#.lp 'loop until 16KB loaded into rom jmp #$ 'wait for reset rom_write long $30000000 'rom write command byte_count long $4000 'number of rom bytes byte_data res 1 'byte buffer '**************************************** '* * '* Propeller II ROM Booter * '* * '* 4/9/2018 - v32 * '* * '**************************************** CON ' ver = "A" 'Prop123-A9 / BeMicro-A9, 16 cogs, 12 smart pins ' cogs = 16 ' ver = "B" 'DE2-115 ' cogs = 4 ' ver = "C" 'DE0-Nano / DE0-Nano Bare ' cogs = 1 ' ver = "D" 'BeMicro-A2 ' cogs = 1 ' ver = "E" 'Prop123-A7 ' cogs = 4 ver = "F" 'Prop123-A9 / BeMicro-A9, 8 cogs, 64 smart pins cogs = 8 rx_pin = 63 'pin serial receiver tx_pin = 62 'pin serial transmitter spi_cs = 61 'pin SPI memory select spi_ck = 60 'pin SPI memory clock spi_dq = 59 'pin SPI memory data I/O rx_ths = 1 'pin autobaud time high states rx_tne = 0 'pin autobaud time negative edges cog_spi = $000 'cog SPI program start cog_start = $100 'cog code start cog_base64 = $1B0 'cog base64 start lut_buff = $000 'lut serial receive buffer lut_btop = $00F 'lut serial receive buffer top lut_start = $010 'lut code start spi_ok = 0 'bit flags cmd_on = 1 rc_max = 30_000_000 'max frequency of RC oscillator DAT ' ' '******************************************* '* Cog init - overwritten by SPI program * '******************************************* ' orgh $FC000 org ' ' ' Move code into position ' setq #cog_end-cog_code-1 'move cog code into position rdlong cog_start,##@cog_code setq2 #lut_end-lut_code-1 'move lut code into position rdlong lut_start,##@lut_code ...
Comments
We need to figure out how TAQOZ will be invoked. Would a serial command like Prop_TAQ be the way?
I need to put a compiled P2 program into a file so that I can load it. Is there a simple way to do it?
If not, no worries as I will find a program to put hex into a file - its quite short. Just need to verify that the loaded file with SD Boot actually loads and runs
Now, I will digest what you have said above.
Just add your source code after mine and use ctrl-M to see where things are going into $FC000..$FFFFF. My initial boot code assembles from $FC000..$FC547. Yours could immediately follow. You'll need to put an instruction or two into my code to invoke yours, when wanted. Then, just hit F11 and it will download the composite image.
That little program at the very start that runs at $00000 will install everything assembled from $FC000..$FFFFF into the internal 16KB ROM.
On the next reset, that new ROM image will run. If you mess up, just reset your BeMicro-A9 so that it reconfigures everything, including the starting ROM, which allows ROM replacement.
It's way simpler than you are imagining. You get to work in the context of your source code, appended to mine.
Now you're talking, this is better than I hoped for. I am going to try this as soon as I can which unfortunately isn't right at this very moment
Sorry, I am not quite following what you have done.
I presume that the ROM code included in the jic image has the usual download ability from pnut.exe.
If we put our code at $FC000 following the cog & lut load instructions we will be good to go as the "little header program" will execute and copy the new ROM from $FC000 into some "hidden 16KB" place ready for the next boot. Is this correct???
That's right. The ROM within the FPGA configuration tells PNut that it has 1MB of hub RAM, which permits loading all the way up to $FFFFF. Remember that the last 16KB of hub RAM appears at both $7C000..$7FFFF and $FC000..$FFFFF, in the case of a 512KB hub, which is what these FPGA images have. Anyway, that appearance of 1MB permits the last 16KB to be loaded all the way up at $FC000..$FFFFF, which allows correct ORGH values in your source code.
That little program at the beginning at $00000 transfers the downloaded code up at $FC000..$FFFFF into the ROM. That way, on the next reset, your new ROM image runs. If you wind up locking things up, just cycle power on your BeMicro-A9 so that it reloads the original ROM which tells PNut that it's okay to load all the way to $FFFFF, again. In fact, you will need to cycle power on every new try, because my ROM code will set things properly to 512KB of hub RAM, inhibiting the reload up to $FFFFF.
I have the SD Boot code working using my method to load a named file in FAT32 into hub at $0 upwards, then copying the bottom 496 longs to cog and executing it. It works, flashing my leds in sequence. I have verified the whole 32KB loads into hub.
Now to remove all the debug info. Not sure if I will complete this until Thursday tho'. Once done, I can put it into your code above
BTW I have some routines that provide some debugging in hubexec mode, like outputting memory contents from cog/lut/hub, etc.