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Instruction time for RDBYTE / RDWORD / RDLONG

Do they all execute in the same number of cycles? I know they can range from 8 to 23 clock cycles, But beyond that, does a RDLONG take the same time to run as a RDBYTE?

I'm asking because I have a driver I'm working on that drives a OLED 4-bit grey scale display. I have an 8,192 byte array that stores the RAM for the display and when writing characters (in a graphics mode) I need to read/write to that display RAM that is in HUB ram using a COG. I'm trying to reduce the number those reads/writes.

Right now I'm doing it in bytes so for each 8x8 character I'm executing 128 transfers (64 reads & 64 Writes) between HUB and COG memory.

I'm also storing the 128 character definitions in HUB ram. so I have 8 byte reads for each character. I'm looking to also move those definitions to COG RAM because the text drivers does not really have to do too much and I can spare the memory for increased speed.

Also looking to have a scratch pad area that will first see if we have already read a LONG from the HUB Display RAM and if so, work on it locally. Then when all the pixels have been set, write all LONGS back to HUB Ram. Would basically be like an array of offsets into the display RAM and the Value.

If this display was a 1-bit display it would be so much easier.

Comments

  • 3 Comments sorted by Date Added Votes
  • Jim Fouch wrote:
    But beyond that, does a RDLONG take the same time to run as a RDBYTE?
    Yes.

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • Jim Fouch wrote: »
    Do they all execute in the same number of cycles? I know they can range from 8 to 23 clock cycles, But beyond that, does a RDLONG take the same time to run as a RDBYTE?

    I'm asking because I have a driver I'm working on that drives a OLED 4-bit grey scale display. I have an 8,192 byte array that stores the RAM for the display and when writing characters (in a graphics mode) I need to read/write to that display RAM that is in HUB ram using a COG. I'm trying to reduce the number those reads/writes.

    Yes they all needs the same number of cycles, however beware that they read from the size boundary, for example, if you rdword from location $7001 the actual data will be read from locations $7000 and $7001 and not from $7001 and $7002 as one would expect, the same for rdlong. These instructions sets the address bit0 (rdword) or bit0-1 (rdlong) to zero before reading. Same for the write instructions.
    VT-100 Terminal and Graphics Card for the RC2014 Z80 Computer
  • macca wrote: »

    Yes they all needs the same number of cycles, however beware that they read from the size boundary, for example, if you rdword from location $7001 the actual data will be read from locations $7000 and $7001 and not from $7001 and $7002 as one would expect, the same for rdlong. These instructions sets the address bit0 (rdword) or bit0-1 (rdlong) to zero before reading. Same for the write instructions.

    That's a good thing to know. Thanks
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