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Trying to understand 32 bit registers — Parallax Forums

Trying to understand 32 bit registers

lardomlardom Posts: 1,659
in Propeller 1
I just watched a video about a 4 bit adder. It makes sense to me: An XOR gate is connected in parallel to an AND gate and the "carry-out" is connected to the "carry-in" of the next adder.
Does that mean the Propeller has a 32-bit adder for each register?

Comments

  • Mike GreenMike Green Posts: 23,101
    edited 2017-10-03 16:35
    No. Some internal registers (like the cog counters, program counter, etc.) probably can increment (+1), some decrement (-1). There's usually one central adder / logic block (arithmetic / logic unit - ALU) for each cog. The Propeller reads from one cog memory location (source) to a temporary register, then reads from another memory location (destination). The ALU gets one input from the temporary register and a second input from the memory output (usually another temporary register). The ALU output is connected to the memory write circuitry and after enough time for the ALU to finish its work, the memory is instructed to write the result back to a memory location (destination). To simplify things, this time is fixed (clock cycle) based on the worst case timing.
  • lardomlardom Posts: 1,659
    Ah, the ALU. I've heard of it. Thanks Mike.
  • Mike GreenMike Green Posts: 23,101
    Most computers have one. It's usually the most complex piece of logic with the longest logic paths (and times to a stable result). Some computers have separate integer and floating point ALUs. Some may have several of each plus a very complicated unit to keep track of which ones are busy and whether one of them depends on a result that another unit is still working on.

    The ALU in the Propeller has what's called a "barrel shifter" that can shift a value left or right from 1 to 31 bits with or without sign extension or a carry bit as the 33rd bit ... all in a single operation.
  • Mark_TMark_T Posts: 1,981
    And an XOR parity-tree circuit that can set the carry flag to the parity of any subset of the registers bits (the
    TEST instruction does this, it can be very useful.

    So the ALU has add/sub/neg/abs/or/and/nand/xor/shift/rotate/parity/reverse/compare circuitry and probably a few
    things I've forgotten.

    The registers are just a block of SRAM that the ALU gets to read/write.

    All of this times 8 of course as each cog has its own.
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