I've been trying to understand AUGS/AUGD and I have a few questions. Here are the two opcodes with slightly different spacing from normal:
EEEE 11110 NNNNNNNNNNNNNNNNNNNNNNN AUGS #N
EEEE 11111 NNNNNNNNNNNNNNNNNNNNNNN AUGD #N
1. Do AUGS/AUGD apply to all instructions that use S/D or only a few?
2. I assume N is loaded into a 23-bit register/latch used only by AUGS/AUGD and AUG flags are set, which are cleared sometime during the following instruction after the AUG address register has been read and it is safe to be interrupted. Is that correct?
3. If the address space is only 20-bit, how can a combined 32-bit address be used?
4. I have modified the opcodes above, replacing the Ns with 23 unique lower-case letters for clarity (I hope):
EEEE 11110 abcdefghijklmnopqrstuvw AUGS #a...w
EEEE 11111 abcdefghijklmnopqrstuvw AUGD #a...w
How are the individual abc...uvw bits combined with SSSSSSSSS or DDDDDDDDD exactly?
Are the following examples from the documentation
%000000000000AAAAAAAAAAA_AAAAAAAAA AUGS, 20-bit immediate
%000000001SUPNNNNNNNNNNN_NNNNNNNNN AUGS, PTRx expression
%000000000000mnopqrstuvw_SSSSSSSSS AUGS, 20-bit immediate
%000000001jklmnopqrstuvw_SSSSSSSSS AUGS, PTRx expression
If so, how or where are abcdefghi used?