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AUGS/AUGD queries — Parallax Forums

AUGS/AUGD queries

TonyBTonyB Posts: 73
edited 2017-04-28 14:47 in Propeller 2
I've been trying to understand AUGS/AUGD and I have a few questions. Here are the two opcodes with slightly different spacing from normal:
EEEE 11110 NNNNNNNNNNNNNNNNNNNNNNN 	AUGS    #N
EEEE 11111 NNNNNNNNNNNNNNNNNNNNNNN	AUGD    #N

1. Do AUGS/AUGD apply to all instructions that use S/D or only a few?

2. I assume N is loaded into a 23-bit register/latch used only by AUGS/AUGD and AUG flags are set, which are cleared sometime during the following instruction after the AUG address register has been read and it is safe to be interrupted. Is that correct?

3. If the address space is only 20-bit, how can a combined 32-bit address be used?

4. I have modified the opcodes above, replacing the Ns with 23 unique lower-case letters for clarity (I hope):
EEEE 11110 abcdefghijklmnopqrstuvw 	AUGS    #a...w
EEEE 11111 abcdefghijklmnopqrstuvw 	AUGD    #a...w
How are the individual abc...uvw bits combined with SSSSSSSSS or DDDDDDDDD exactly?

Are the following examples from the documentation
%000000000000AAAAAAAAAAA_AAAAAAAAA	AUGS, 20-bit immediate
%000000001SUPNNNNNNNNNNN_NNNNNNNNN	AUGS, PTRx expression
equivalent to
%000000000000mnopqrstuvw_SSSSSSSSS	AUGS, 20-bit immediate
%000000001jklmnopqrstuvw_SSSSSSSSS	AUGS, PTRx expression

If so, how or where are abcdefghi used?

Comments

  • ersmithersmith Posts: 6,053
    I think AUGS/AUGD are only for use with immediate instructions. The effect of: 
        AUGS #%abcd...uvw
    ADD  x, #%SSSSSSSSS
    is to add the 32 bit value %abcd...uvwSSSSSSSSS to x. It's particularly useful in HUB or LUT execution, as an easy way of generating 32 bit constants without requiring a COG register. As such, AUGS will be used a lot more often than AUGD, since more instructions have immediate sources than immediate destinations.

    AUGS is not to be confused with ALTS, which completely replaces the source field of the next instruction. It's also not usually necessary to explicitly write the AUGS, since the assembler can do it for you. The above code is the same as: 
        ADD x, ##%abcd...uvwSSSSSSSSS
    where the '##' tells the assembler to emit an AUGS before the ADD in order to achieve a full 32 bit immediate.

    Eric
  • TonyBTonyB Posts: 73
    Thank you, that probably answers both Q3 and Q4. I was thinking too much about addresses.
  • TonyBTonyB Posts: 73
    edited 2017-04-30 18:11
    .
  • TonyBTonyB Posts: 73
    edited 2017-04-30 18:11
    .
  • jmgjmg Posts: 15,173
    TonyB wrote: »
    Please ignore the above, I've had a better idea.
    You cannot delete a post, but you can edit it down as small as '.'

  • evanhevanh Posts: 15,915
    To answer question #1 more precisely, an AUGx instruction gets apply to the next instruction that can use it rather than always the following instruction. Instructions that can use it are ones that have immediate (#) addressing mode only for the respective S and D operands.

    So, for example, NOP has no operands so will not consume any proceeding AUGx setup. The AUGx setup carries for a future instruction ... An AUGS #5000 preceding an ADD D,S won't consume the setup but a subsequent ADD D,#5 will add #5005 to D and consume the setup. I don't think there is any limit to the number of instructions it can carry for.

    The two AUGx's (AUGS/AUGD) themselves can both be setup without interference. I don't know if there is a special order required or they are just considered special and therefore it don't matter.

    And lastly, I think, for any hand set AUGx's in Pnut, the text values are treated as whole absolute so when converted to machine code get their bottom 9 bits trimmed. Easier to use ## instead.
  • evanhevanh Posts: 15,915
    As a pointer, HubRAM read/write opcodes use S operand so again you'd want to use AUGS to set a 32-bit Hub address, branching instructions use D operand so AUGD for them to reach across large spaces in HubRAM.

    On that note, setting up HubRAM burst mode operation (RDFAST/WRFAST/FBLOCK) can nicely use both AUGS and AUGD together.
  • pilot0315pilot0315 Posts: 910
    Would someone please define AUGS and the associated stuff for that. I cannot find what the acronym means.

    Thanks
  • Mark_TMark_T Posts: 1,981
    AUGment Source
    AUGment Destination
  • msrobotsmsrobots Posts: 3,709
    edited 2019-02-14 16:45
    I had to edit this, @evanh explained me my mistake

    ALTx changes the next instruction
    AUGx extend the range of D and S of up-coming immediate fields to full 32-bit in each case. Not necessarily in the next instruction either.

    so a standard

    mov register, #value where value is a constant

    is restricted to 0-511 for value because we just have space for 9 bits
    if you have a bigger value you can use ALTS, the needed value for ALTS are the other bits.

    AUGS #(value>>9)
    mov register,#(value & 511)

    This is inconvient to write so the assembler has a short form, doing the same.

    mov register, ##value

    will create both instructions for you, notice the two # instead of one

    AUGD does the same for the destination

    ALTS sets/changes the source operant of the following instruction
    ALTD sets/changes the destination operant of the following instruction
    ALTI sets/changes the instruction part of the following instruction, keeping D and S

    This for self modifying code on the P1 you would directly change the bits in the instruction but you needed 2 instructions between changing and executing.

    On the P2 the instructions are pipelined (cached?) so the period between changing a instruction and being able to use it would take 4(8?) instructions between changing a instruction and being able to execute it.

    Thus the need for those instruction

    Enjoy!

    Mike
  • evanhevanh Posts: 15,915
    Mike,
    That's the ALTx instructions you're thinking of.

    AUGD and AUGS are just for extending up-coming immediate fields to full 32-bit in each case. Not necessarily in the next instruction either.
  • msrobotsmsrobots Posts: 3,709
    edited 2019-02-14 16:47
    ohhshhh,

    you are right. I edited the post

    Not necessarily in the next instruction either. cool

    Mike
  • evanhevanh Posts: 15,915
    Not only does the recipient of an AUGx not have to be the next instruction but it depends on full execution. In this example the AUGS is applied to the MOV, not the ADD. 
    		augs	#$1211
		xor	pa, pa		wz
if_nz		add	pa, #1
		mov	pa, #$31
		call	#itoh
  • Mark_TMark_T Posts: 1,981
    I presume the assembler duplicates the condition to the AUGx instruction when converting ## notation? In fact I'm sure it must do as I've relied on this.

    SKIP and SKIPF are presumably a minefield for combining with ## expansions, that is presumably a case where
    explicitly using AUGx is worthwhile.
  • ElectrodudeElectrodude Posts: 1,657
    Mark_T wrote: »
    I presume the assembler duplicates the condition to the AUGx instruction when converting ## notation? In fact I'm sure it must do as I've relied on this.

    SKIP and SKIPF are presumably a minefield for combining with ## expansions, that is presumably a case where
    explicitly using AUGx is worthwhile.

    This is why the assembler should make SKIPF masks for you.
  • Cluso99Cluso99 Posts: 18,069
    evanh wrote: »
    Not only does the recipient of an AUGx not have to be the next instruction but it depends on full execution. In this example the AUGS is applied to the MOV, not the ADD. 
    		augs	#$1211
		xor	pa, pa		wz
if_nz		add	pa, #1
		mov	pa, #$31
		call	#itoh

    Interesting. I just had to run a program to prove this!

    Seems the AUGS will only insert into the next instruction that executes with an immediate S.
  • msrobotsmsrobots Posts: 3,709
    and that is very cool. As more as I dig into PASM2 the more I like it. And I am just touching the basics right now.

    Enjoy!

    Mike
  • TonyB_TonyB_ Posts: 2,178
    edited 2019-02-15 11:38
    deleted
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