Interesting to read about the TinyFPGA EX progress, as haven't checked it out in a while. In some earlier work I did I found that the Lattice ECP5 FPGA family is pretty much an ideal match for a low cost complete P1V implementation with room for some extra peripherals. Specifically the ECP5 LFE5U-25F FPGA variant was a real sweet spot. Pity that part is not one of the targets of the TinyFPGA EX though as Luke seems to have chosen the 12F, 45F, and 85F parts for his board. So you would need to either get the -45F model or above for a full 8 COG P1V and this leaves heaps of spare space, maybe you could even squeeze two bare bones P1Vs in it or a 16 COG variant with some redesign of the hub.
CrossLink-NX Device Selection Guide
Features LIFCL-17 LIFCL-40
Logic Cells 17K 39K
Embedded Memory (EBR) Bits (Kb) 432 1512
Large Memory (LRAM) Bits (Kb) 2560 1024
18 X 18 Multipliers 24 56
ADC Blocks 2 2
GPLL 2 3
Hardened 10 Gbps D-PHY Quads 2 2
Hardened 2.5 Gbps D-PHY Data Lanes (total) 8 8
5 Gb/s PCIe Gen2 Hard IP — 1
0.4 mm Total I/O (D-PHY, PCIe, Wide Range, High Performance)
LIFCL-17 LIFCL-40
72 wlcsp (3.7 x 4.1 mm) 36 (1, 0, 16, 20) —
0.5 mm Total I/O (D-PHY, PCIe, Wide Range, High Performance)
LIFCL-17 LIFCL-40
72 QFN (10 x 10 mm) 40 (1, 0, 18, 22) 40 (1, 0, 18, 22)
121 csfBGA (6 x 6 mm) 48 (2, 0, 24, 48) 72 (2, 0, 24, 48)
289 csfBGA (9.5 x 9.5 mm) — 180 (2, 1, 106, 74)
0.8 mm Total I/O (D-PHY, PCIe, Wide Range, High Performance)
LIFCL-17 LIFCL-40
256 caBGA (14 x 14 mm) 72 (2, 0, 24, 48) 152 (2, 1, 78, 74)
400 caBGA (17 x 17 mm) — 192 (2, 1, 118, 74)
fIN Input Clock Frequency (CLKI, CLKFB) 10 — 500 MHz
fOUT Output Clock Frequency 6.25 — 800 MHz
fVCO PLL VCO Frequency 800 — 1600 MHz
fCLKHF HFOSC CLKK Clock Frequency 405 ~ 450 ~ 495 MHz
fCLKLF LFOSC CLKK Clock Frequency 121.6 ~ 128 ~ 134.4 kHz
Price indications are showing for LIFCL-40-7SG72CES IC FPGA Crosslink-nx Es 72QFN ~$31.25
- nothing showing for LIFCL-17
The QFN72 is the roughly the same size as P1, and appears to support both parts, which could be flexible. Or, the 6x6mm BGA is very compact.
Data shows a HFOSC of 450MHz and 28nm process.
This detail is interesting : Instant on performance – to better support applications where a long system boot time is unacceptable, such as industrial motor control, CrossLink-NX enables ultra-fast I/O configuration in 3 ms and total device configuration in less than 15 ms.
P1V and P2 could be designed to do a similar thing, where IO is defined faster than total boot time. ?
Nice parts ! and the same package the MachXO3D is getting (QFN72).
I don't know though when these parts will be available, the MachXO3D showed up like in May this year, today I consulted Mouser agaian and finally they show an availability date... Sept 2020 !... let's see what happens.
.. and more FPGAs, these from lattice
Price indications are showing for LIFCL-40-7SG72CES IC FPGA Crosslink-nx Es 72QFN ~$31.25
- nothing showing for LIFCL-17
The QFN72 is the roughly the same size as P1, and appears to support both parts, which could be flexible. Or, the 6x6mm BGA is very compact.
Data shows a HFOSC of 450MHz and 28nm process.
I'll bump this, as prices are showing of from $13/100 on the LIFCL-17 in QFN72. Mouser says stocks due March/April 2021 and Eval Boards are in stock now.
Comments
Of interest here are mention of mask-ROM (Up to T120 parts) and hard-IP in the interface areas. eg DDR3 allows lots of low cost SDRAM to be added.
https://www.efinixinc.com/docs/trion-overview-v1.7.pdf
Page 1 prices update and Trion added.
CrossLink-NX Device Selection Guide Features LIFCL-17 LIFCL-40 Logic Cells 17K 39K Embedded Memory (EBR) Bits (Kb) 432 1512 Large Memory (LRAM) Bits (Kb) 2560 1024 18 X 18 Multipliers 24 56 ADC Blocks 2 2 GPLL 2 3 Hardened 10 Gbps D-PHY Quads 2 2 Hardened 2.5 Gbps D-PHY Data Lanes (total) 8 8 5 Gb/s PCIe Gen2 Hard IP — 1 0.4 mm Total I/O (D-PHY, PCIe, Wide Range, High Performance) LIFCL-17 LIFCL-40 72 wlcsp (3.7 x 4.1 mm) 36 (1, 0, 16, 20) — 0.5 mm Total I/O (D-PHY, PCIe, Wide Range, High Performance) LIFCL-17 LIFCL-40 72 QFN (10 x 10 mm) 40 (1, 0, 18, 22) 40 (1, 0, 18, 22) 121 csfBGA (6 x 6 mm) 48 (2, 0, 24, 48) 72 (2, 0, 24, 48) 289 csfBGA (9.5 x 9.5 mm) — 180 (2, 1, 106, 74) 0.8 mm Total I/O (D-PHY, PCIe, Wide Range, High Performance) LIFCL-17 LIFCL-40 256 caBGA (14 x 14 mm) 72 (2, 0, 24, 48) 152 (2, 1, 78, 74) 400 caBGA (17 x 17 mm) — 192 (2, 1, 118, 74) fIN Input Clock Frequency (CLKI, CLKFB) 10 — 500 MHz fOUT Output Clock Frequency 6.25 — 800 MHz fVCO PLL VCO Frequency 800 — 1600 MHz fCLKHF HFOSC CLKK Clock Frequency 405 ~ 450 ~ 495 MHz fCLKLF LFOSC CLKK Clock Frequency 121.6 ~ 128 ~ 134.4 kHzPrice indications are showing for LIFCL-40-7SG72CES IC FPGA Crosslink-nx Es 72QFN ~$31.25
- nothing showing for LIFCL-17
The QFN72 is the roughly the same size as P1, and appears to support both parts, which could be flexible. Or, the 6x6mm BGA is very compact.
Data shows a HFOSC of 450MHz and 28nm process.
This detail is interesting :
Instant on performance – to better support applications where a long system boot time is unacceptable, such as industrial motor control, CrossLink-NX enables ultra-fast I/O configuration in 3 ms and total device configuration in less than 15 ms.
P1V and P2 could be designed to do a similar thing, where IO is defined faster than total boot time. ?
I had a bit of a look. The device with more LE's gains them at the expense of less memory, unfortunately
I also found "project trellis" that is making inroads into the configuration bitstream of the ECP5 series, which is exciting
I don't know though when these parts will be available, the MachXO3D showed up like in May this year, today I consulted Mouser agaian and finally they show an availability date... Sept 2020 !... let's see what happens.
I'll bump this, as prices are showing of from $13/100 on the LIFCL-17 in QFN72. Mouser says stocks due March/April 2021 and Eval Boards are in stock now.
2 or 3 PLLs, enough hub ram, compact 6x6mm in both sizes, 28nm should be plenty fast