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Oscillator Fan Out — Parallax Forums

Oscillator Fan Out

I'm designing a board that will be like a back plane with a few slots (think Apple IIe).

Each slot will have connections to the Propeller pins but I thought it might be nice to also include a connection to the main oscillator so that other Propellers could be plugged in and driven off the same clock.

But since this board will be on the large size, I was wondering if sending that 5-6 MHz clock all the way out to slot X is a bad idea? It's not an absolute must.

If this is a bad idea, I'd also like to know why for educational purposes as well.

Thanks for any pointers!

Comments

  • kwinnkwinn Posts: 8,697
    edited 2016-08-16 22:10
    If you mean connecting the XO pin directly to the slots, then it is a bad idea. You are adding capacitance to the oscillator pin and loading it down. You would need to buffer the signal to minimize the added capacitance and provide the drive needed for the clock bus signal.

    Better to use an I/O pin for that if you can spare it.
  • jmgjmg Posts: 15,173
    cbmeeks wrote: »
    But since this board will be on the large size, I was wondering if sending that 5-6 MHz clock all the way out to slot X is a bad idea? It's not an absolute must.

    If this is a bad idea, I'd also like to know why for educational purposes as well.
    As mentioned above, sending XO on a long trip is not a good idea.
    That said, directly sending a HCMOS squared signal is also not great either.

    The newest signal for low power, and lower EMC, is a Clipped Sine (see GPS TCXOs ), so you ideally need to emulate that.
    Choices would be an analog buffer, that sends a sine-copy of XO, or a squarer + LPF + emitter follower.
    The details here depend on what bufferRX is used on the slave boards.
    A voltage translating buffer could let you use a lower swing clipped sine.

    MCU vendors are a little slow to catch on to this new Clipped-Sine as a source, and I've asked a couple to test & qualify their oscillator amplifiers with such a signal.
    I think in most cases, an AC coupled > 0.8Vp-p Clipped-Sine into XI will be ok.




  • Thanks for the information.

    It's not a requirement for me so I will probably leave it off. What I was trying to emulate was, like in the Apple IIe, each slot has access to the system clock. But, it's only 1 MHz.
  • kwinnkwinn Posts: 8,697
    There are chips available for buffering/driving clock signals on a bus for under a dollar if you had a need for a clock on the bus. For sure frequencies up to 250MHz are available and they may go higher.
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