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How to do 1080p?

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  • Just confirmed its working well with the MS9282 based VGA->HDMI generator too
  • jmgjmg Posts: 14,752
    Rayman wrote: »
    Anyway, it looks like you don't have to have the exact right frequency for 1080p to work on an HDTV.
    But, you probably should pick a VGA mode for computer monitors...


    You are talking about Pixel Frequency here ? ( or Line F or Frame F ?)

  • RaymanRayman Posts: 12,084
    pixel, but the others too...
  • cgracey wrote: »
    The only PLL in the Prop2 will be for the main clock. If you want 148.5MHz, you'll need to clock the whole chip at that frequency.

    Then how can we use the P2 when multiple clocks are required, exact frequency is required, and there is not common clock divisor?

    Consider this example: one cog used for Ethernet (25/50/125 MHz), another cog used for USB (12 MHz). another cog for I2S (11.0592 MHz), another cog for UART (1.8432 MHz), another cog for NTSC (3.595295 MHz), ...
  • RaymanRayman Posts: 12,084
    What we've seen here is that in some cases the frequency doesn't have to be exact.

    If the P2 clock speed can approach 200 MHz, we will probably be OK in a lot of cases.
  • We have pin interrupts.

    Seems to me, external clock references can be used that way.
  • jmgjmg Posts: 14,752
    edited 2016-03-06 17:59
    Ramon wrote: »

    Then how can we use the P2 when multiple clocks are required, exact frequency is required, and there is not common clock divisor?

    Consider this example: one cog used for Ethernet (25/50/125 MHz), another cog used for USB (12 MHz). another cog for I2S (11.0592 MHz), another cog for UART (1.8432 MHz), another cog for NTSC (3.595295 MHz), ...
    You cannot run GOGS at different frequencies, but in most of your examples a numeric NCO version of that freq will be ok. There is NCO reset to remove sub-freq jitter.

    In cases where exact fo is needed, there is Si5351 type parts, those will rely on good external clock feeds to the streamer.

    The suggested small fix to PLL M/N will help granularity & give more source choices.

  • cgracey wrote: »
    The only PLL in the Prop2 will be for the main clock. If you want 148.5MHz, you'll need to clock the whole chip at that frequency.

    On the P1, there was RealRandom.spin for generating true random numbers that used the counters' PLLs. Will there be any way to get true random numbers without external hardware on the P2?
  • cgracey wrote: »
    The only PLL in the Prop2 will be for the main clock. If you want 148.5MHz, you'll need to clock the whole chip at that frequency.

    On the P1, there was RealRandom.spin for generating true random numbers that used the counters' PLLs. Will there be any way to get true random numbers without external hardware on the P2?

    Yes somewhere in this thread it is mentioned. Basically the same way as in the P1. There is a instruction for getrnd?

    Enjoy!

    Mike
  • ElectrodudeElectrodude Posts: 1,440
    edited 2016-03-07 03:04
    msrobots wrote: »
    cgracey wrote: »
    The only PLL in the Prop2 will be for the main clock. If you want 148.5MHz, you'll need to clock the whole chip at that frequency.

    On the P1, there was RealRandom.spin for generating true random numbers that used the counters' PLLs. Will there be any way to get true random numbers without external hardware on the P2?

    Yes somewhere in this thread it is mentioned. Basically the same way as in the P1. There is a instruction for getrnd?

    But I thought getrnd only read a pseudo-random RNG and not a true RNG with an analog component? Or did I miss something?
  • RaymanRayman Posts: 12,084
    Chip mentioned something about a real random somehow, but I don't remember...
    Think the smartpins were involved somehow...
  • TubularTubular Posts: 4,376
    edited 2016-03-07 04:05
    .
  • GETRND is based upon a LFSR.
    I found by inserting GETRND in between cordic/hub instructions helps "randomize" it further.
  • cgraceycgracey Posts: 13,610
    Real random numbers can come from LSB noise in the ADC converters in each pin.
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