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1T/2T SRAM uses 1/5 area of existing 6T designs. Can this help the P2 ??? — Parallax Forums

1T/2T SRAM uses 1/5 area of existing 6T designs. Can this help the P2 ???

Cluso99Cluso99 Posts: 18,069
in Propeller 2
Here are the details
http://www.zenosemi.com/#!memory-technology/v8i3s

This could be an exciting breakthrough for P2 if it is available and is not too expensive (IP).

Comments

  • koehlerkoehler Posts: 598

    Seems to be demo at 28nm.

    At some point, if it works it would be licensable IP.
    Would not hold my breath expecting this to be backported to 180nm any time soon.
  • jmgjmg Posts: 15,173
    koehler wrote: »
    Would not hold my breath expecting this to be backported to 180nm any time soon.
    That depends on OnSemi, who would need to qualify this on their process.
    The fundamental idea sounds reasonably process-portable, but it would need to be fab'd, tested and tuned.
    Likely would add 6 months+ to P2 delivery.
    Sounds like a good choice for a P2B or P2++, - a respin with more RAM.

  • cgraceycgracey Posts: 14,152
    I can't figure out how it works. They say they have proven it at 28nm, though. I wonder if they'd care to take it to 180nm.
  • Cluso99Cluso99 Posts: 18,069
    cgracey wrote: »
    I can't figure out how it works. They say they have proven it at 28nm, though. I wonder if they'd care to take it to 180nm.
    I have asked ;)
    But I bet the IP will be expensive :(

    Maybe they would like to test it at 180nm on the P2 for us ???

    Some reports are saying it might challenge DRAM.
  • evanhevanh Posts: 15,915
    Haven't tried to read any yet but this - http://www.eejournal.com/archives/articles/20160104-zeno/ - will likely be more informative than the script infested Zeno website.
  • evanhevanh Posts: 15,915
    And these guys - http://www.tezzaron.com/3t-iram/ - are saying the typical 1T-SRAM is as slow as DRAM.
  • jmgjmg Posts: 15,173
    cgracey wrote: »
    I can't figure out how it works. They say they have proven it at 28nm, though. I wonder if they'd care to take it to 180nm.
    I think it is similar to the latch-up effect lateral PNP transistors give.
    If you want to avoid refresh, you need more transistors - these guys just claim the cell is smaller, not that the effective transistor count has changed much. They just sneak some extra ones in the same area.
    evanh wrote: »
    And these guys - http://www.tezzaron.com/3t-iram/ - are saying the typical 1T-SRAM is as slow as DRAM.
    Could be true, as lateral / parasitic transistors are never as fast.


  • Beau SchwabeBeau Schwabe Posts: 6,566
    I believe it's just a variation of the classic Bi-stable Multivibrator in disguise ....

    tim17a.gif
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