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NewCog Problem — Parallax Forums

NewCog Problem

The object shown below works. If I change a portion of it to run in a newcog the values returned are wrong.
There are two REMARKS to remove and one to add when changing over to the newcog method. I have played around with sharing data between cogs, this code is not incorporating my lock method. I don't believe the erroneous data is a memory contention issue.
{
The anolog to digital portion is from
 CD_LTC1298.spin from the OBEX                         }

CON
        _clkmode = xtal1 + pll16x                                               'Standard clock mode * crystal frequency = 80 MHz
        _xinfreq = 5_000_000
         delay  = 10_000        
  CH0 = %1011          ' Note: Shift LSB first so bits are reversed from Datasheet
  CH1 = %1111          ' Note: See Datasheet MUX Addressing for more details
  
VAR
  long temp
  long stack[50]
  long pitch
  long yaw
  
  byte ADC             ' Analog to Digital Channel Din Value.  Set using CON values.
  word pin             ' Received PINs from other .spin object
  word dataio          ' Din, Dout Pins  - input/output.  High impedance protects Dout pin while writing Din
  word cs              ' Chip Enable Pin - output
  word clk             ' Chip Clock Pin  - output
  long datar           ' 12 Bit return value from conversion

OBJ   
      pst : "Parallax Serial Terminal" 
  
PUB Main
    pst.Start(115200)
    start
    waitcnt(700+ cnt) 
   'cognew(ADC_Stuff,@stack)            'Always returns the value 8191          remove remark when running in a newcog ********     
   waitcnt(700+ cnt)
    
  repeat
     ADC_Stuff        '  Remark this out when running the cognew  ************
    pst.home
    pst.Str(@name)
    pst.newline
    pst.str(string("Pitch value is..",pst#NL) )           
    pst.str(string("Yaw value is..",pst#NL) )              
     pst.Position(17,1)
     pst.ClearEnd  
    pst.dec(pitch) 
      pst.Position(17,2)
      pst.ClearEnd                         
      pst.dec(yaw)

pub ADC_stuff
'repeat                              ' Remove remark when running in a newcog *********
    pitch:= convert(0) 
    delay_us(2)   
    yaw:= convert(1)
    delay_us(2) 
   
PUB start
  pin := 0
  init(pin, pin+1, pin+2)

Pub init( cs_, clk_, dataio_ )

  cs      := cs_
  clk     := clk_
  dataio  := dataio_

  dira[clk]  := 1                   ' set clk pin to output
  outa[clk]  := 0                   ' Set clk to Low
  dira[cs]   := 1                   ' set Chip Select to output
  outa[cs]   := 1                   ' set Chip Select High

Pub convert( ad_chan ) : datar_val

  if (ad_chan == 0)
    ADC := CH0
  if (ad_chan == 1)
    ADC := CH1

  dira[dataio] := 1                ' Set Din/Dout to output
  outa[dataio] := 0                ' Set Din (output) Low
  
  datar := write(ADC)              ' write MUX Address to start conversion for SDC channel (delay needed???)
  return datar

Pub write( cmd ) : datar_val | i  

  datar := 0                    ' Clear the data storage LONG

  outa[cs] := 0                 ' set Chip Select Low          
  writeByte( cmd )              ' Write the command to start conversion for X port
  dira[dataio] := 0             ' set data pin to input
  delay_us(2)                   ' Clock delay
  
 ' Ok now get the Conversion for this channel  
  repeat i from 12 to 0         ' read 12 bits 11-0 for MSB
    outa[clk] := 1              ' toggle clk pin High
'    delay_us(2)                 ' Clock delay
    if ina[dataio] == 1         
      datar |= |< i             ' set bit i HIGH
    else
      datar &= !|< i            ' set bit i LOW
    outa[clk] := 0              ' toggle clk pin Low
'    delay_us(2)                 ' Clock delay

  outa[cs] := 1                 ' set Chip Select High
            
  return datar

Pub writeByte( cmd ) | i  

  repeat i from 0 to 3          ' LTC1298 has 1 start bit and 3 data bits    
    outa[dataio] := cmd         ' send LSB bit
    outa[clk] := 1              ' toggle clk pin High, Chip reads on rising edge. 
'    delay_us(2)                 ' Clock delay
    outa[clk] := 0              ' toggle clk pin Low
'    delay_us(2)                 ' Clock delay
    cmd >>= 1                   ' shift to next bit

Pub delay_us( period )
' CLK HIGH/LOW time = 2µS MIN
  waitcnt((clkfreq / 100000 * period) + cnt)   ' Wait for designated time

DAT
name    byte  "string_data",0        

Comments

  • The first thing that jumps out is that you're calling "start" from the main cog when you should be calling it from ADC_stuff. Each cog has its own DIR and OUT registers and DIR set from one cog doesn't carry over to another.
  • Thanks Mike.
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