P2 Interrupt architecture - WOW!
mindrobots
Posts: 6,506
in Propeller 2
I've spent much of today reading the interrupts section of the docs and scratching the surface of what they can do and marveling at how elegantly simple they are to set up and use. Bravo, Chip!!! 
We went from having a Propeller with no interrupts to this Propeller2 with the potential to have 16 simultaneous, 3 level interrupt handlers that can monitor any combination of 12 events. The programmer has complete control over the events triggering interrupts and the priorities. On top of that, you can POLL or WAIT on any of those events that you don't feel like interrupting on. Or, you can not use interrupts at all and it is just like your old familiar Propeller.
(Oh yeah, there's the debug facility too which doesn't even play into any of this discussion.)
I haven't played with modern chips with interrupts. Last I remember, it seems like there was the good old NMI and then maybe a few more interrupts tied to pins? Are there any controllers out there now with this sort of interrupt potential and software configurable flexibility?
I've been saying WOW a lot today as I read things and try things!
Wow! Awesome P2 sauce!!!!
Simple to use?
1) point to the ISR with ijmp1, ijmp2 or ijmp3
2) let the COG know what event you want to interrupt on for each of priority 1, 2 or 3
3) if needed, let the COG/HUB know which memory location you want to watch (RD/WR)
Simple example are posted here.
We went from having a Propeller with no interrupts to this Propeller2 with the potential to have 16 simultaneous, 3 level interrupt handlers that can monitor any combination of 12 events. The programmer has complete control over the events triggering interrupts and the priorities. On top of that, you can POLL or WAIT on any of those events that you don't feel like interrupting on. Or, you can not use interrupts at all and it is just like your old familiar Propeller.
(Oh yeah, there's the debug facility too which doesn't even play into any of this discussion.)
I haven't played with modern chips with interrupts. Last I remember, it seems like there was the good old NMI and then maybe a few more interrupts tied to pins? Are there any controllers out there now with this sort of interrupt potential and software configurable flexibility?
I've been saying WOW a lot today as I read things and try things!
Wow! Awesome P2 sauce!!!!
Simple to use?
1) point to the ISR with ijmp1, ijmp2 or ijmp3
2) let the COG know what event you want to interrupt on for each of priority 1, 2 or 3
3) if needed, let the COG/HUB know which memory location you want to watch (RD/WR)
Simple example are posted here.
Comments
Some small MCU's get close, - typical is 4 levels if interrupt priority, and many peripherals that have interrupt vectors. Common is a full stack, for both interrupt call stacking and saving registers.
The P2 is a little different - stack is smaller, and limited width, but register-reach is much larger, so save/restore stacking is less needed.
P2 has few hard peripherals, but it does have 16 COGS and this interrupt control is repeated 16 times.
That 16x moves it into unique territory.