New nibble ops speed up SQI?
Rayman
Posts: 14,768
in Propeller 2
So with P1, SQI wasn't 4X speed of SPI because the single bit through carry was very efficient...
Will these new P2 nibble operations (I think there are some, still need to look carefully) change the situation?
I'm going to try an SQI chip on P24..P27 soon and see if there's any improvement...
Will these new P2 nibble operations (I think there are some, still need to look carefully) change the situation?
I'm going to try an SQI chip on P24..P27 soon and see if there's any improvement...
Comments
Edit: of course, this will only work if the data is MSB first. If LSB first, it will take a bit more effort...
Glad I asked then as I have it other way around...
Then again, maybe sqi chip wouldn't know if it were backwards in and out. Have to think about that...
It would tolerate data W/R, but address would need care, (if you wanted to use faster nibble address modes) and if you wanted to mix 1b and 4b modes then it would need the bits in the correct order.
ie best get the bits in right order to start with,.
Looking up SQI I get an quick hit on the PIC32 ... PIC32 defines it's SQI formats as big-endian (ie: Repeated MSB first indicator). I'd think you're quite safe assuming you are already using big-endian encodings.
http://forums.parallax.com/discussion/162315/getnibx-setnibx-bug
From that, I think I have my pins connected the right way as it looks like the source nibble will get shifted left into the lower four bits destination. I guess that's the intra-nibble endian question answer.
The other endian question is nibble endian. Just looked at SST26VF016 datasheet and it is MSN first, so that's all good too.
I'm not sure about SD card nibble order, but hope it's the same...
If there were a RORNIB version of the instruction, I guess it'd be fine either way...