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Stream static VGA from with DE2-115 or P123-A7? — Parallax Forums

Stream static VGA from with DE2-115 or P123-A7?

RaymanRayman Posts: 14,762
edited 2015-10-05 17:42 in Propeller 2
Just thinking about ways to display a static image from HUB RAM to the VGA connector on my DE2-115 P2 adapter board...

Got 256 kB of RAM, should be enough for a 4 bpp image at 640x480.
Clock is 50 MHz and VGA is 25 MHz, so should be able to do 2 instructions in REP loop, right?

We also have new nibble instructions (I think) that should help.

Think I can use the LUT to expand the 4 bpp image into 24 bpp colors.

Would the streamer help with this?
Seems like it should, but I've got no idea how it works...

Did Baggers already get this working?

Comments

  • jmgjmg Posts: 15,175
    edited 2015-10-06 00:56
    Rayman wrote: »
    Just thinking about ways to display a static image from HUB RAM to the VGA connector on my DE2-115 P2 adapter board...

    Got 256 kB of RAM, should be enough for a 4 bpp image at 640x480.
    Clock is 50 MHz and VGA is 25 MHz, so should be able to do 2 instructions in REP loop, right?

    Not quite, IIRC streamer has a NCO clock, so you simply set to /2

    Rayman wrote: »
    We also have new nibble instructions (I think) that should help.

    Think I can use the LUT to expand the 4 bpp image into 24 bpp colors.

    Would the streamer help with this?
    Seems like it should, but I've got no idea how it works...

    Good question, this is where Streamer LUT details get interesting.

    IIRC it used to be just 8 bits, but there are cases where the streamer could benefit from other simple LUT lookup mappings:

    1) Your case of 4b would do 8 reads per LUT line
    2) Also useful is 5 reads of 6b, for a 25% memory gain.
    2b) or, 6 reads of 5 bits
    for 2,2b, Upper 2 bits per Long can be LUT:Page
    3) Possible 4 reads of 7b, with choice of 4x128 tables in upper 2 bits.
    4) 4 reads of 8 bits, 1 x 256L table
    5) 3 reads of 9 bits could index the whole LUT 1 x 512L

    Some Equations are:
    2^19-800*480*4/8 = 332288
    2^19-800*480*5*32/30/8 = 268288 - 4 x 32L tables
    2^19-800*480*6*32/30/8 = 217088 - 4 x 64L tables
    2^19-800*480*8/8 = 140288 - also covers 7b, 4 pages

    2^19-800*600*4/8 = 284288
    2^19-800*600*5*32/30/8 = 204288 - 4 x 32L tables
    2^19-800*600*6*32/30/8 = 140288 - 4 x 64L tables
    2^19-800*600*8/8 = 44288 - also covers 7b, 4 pages

    The 6bit LUT gives quite a gain in spare memory

    Edit: added 6 reads of 5 bits for completeness
  • There's no doubt the streamer will be good for this.

    Have a look at the sine/cosine demo, where the sine and cosine values are packed in separate blocks of bits in the LUT. So far we don't have documentation on xcont, so I'm sure there will be other modes, but even the mode we have will be good for video generation

    OzPropDev and I were able to get a simple ntsc greyscale scan line out and display it on a monitor, by adding porches and a h sync signal. VGA wouldn't be any more complicated. My concern is the full scale DAC resistor may need to be lower to allow sufficient NTSC signal range

  • Just one other thing - its 2 clocks per instruction, ie 25mips, 1 instr per pixel approximately. That'll change later with the PLL fix, or real silicon, of course
  • RaymanRayman Posts: 14,762
    Shoot, I thought it was one instruction per clock...
    That might make it a lot harder...
    Still can go for ModeX at 320x240 and use a full byte per pixel...
  • jmgjmg Posts: 15,175
    Rayman wrote: »
    Shoot, I thought it was one instruction per clock...
    That might make it a lot harder...

    Why ? the streamer needs no opcodes, it works like DMA from the Memory image.
    You set it once per line.
  • I've not had chance to get it done yet, as I'm not sure how to set up the COG streamer, it should be able to do it by itself with not much help from the main COG, just set it to 32bit output ( 24real bits ) then stream a scanline from HUB set it going for 256 longs, that'll give you plenty of time to set up the next stream ( that's assuming a 256 long stream max ) you could even possibly have it 8bit using the LUT? that's assuming you can do that with the new system.
    But I don't think we'll have any timing issues even at 25mips.
  • Tubular, care to share the NTSC signal code?
  • @Baggers
    Here's the code Tubular and myself were playing with.
    Basically modifies Chips sine wave data to include some video sync levels.
    Output looks pretty good on the scop and some monitors will display it too.
    ' "Bare bones NTSC" DAC test
    ' Tubular/Ozpropdev 2015
    
    dat
    		orgh	1
    
    ' make a sin/cos table in LUT and then output it to dacs 1/0
    ' switches between 1x and 2x frequency
    
    		mov	phase,#64	'127 = 90 degress
    
    		mov	z,#$1FF			'make 512-sample sin/cos table in lut
    sincos		mov	x,z			'get angle into top 9 bits of x
    		shl	x,#32-9
    		qrotate	#$7F,x			'get sin/cos of (ro,theta)
    		getqx	x			'get cos
    		xor	x,#$80			'make positive 8-bit value
    
    		mov	y,phase			'get angle into top 9 bits of x
    		shl	y,#32-9
    		qrotate	#$7F,y			'get sin/cos of (ro,theta)
    		getqx	y			'get cos
    		xor	y,#$80			'make positive 8-bit value
    
    
    		setbyte	x,y,#1			'get sin into byte1, cos in byte0
    		wrlut	x,z			'write sin:cos into lut bottom bytes
    
    		incmod	phase,#$1ff
    
    		djns	z,@sincos		'make 512 samples
    
    
    'Modify LUT data to include blank/sync levels
    
    		mov	y,#83	'length
    		mov	x,#145	'starting offset into LUT
    blank		wrlut	#110,x	'write level
    		add	x,#1
    		djnz	y,@blank
    
    		mov	y,#37
    blank2		wrlut	#0,x	'write level	
    		add	x,#1
    		djnz	y,@blank2
    
    		mov	y,#105
    blank3		wrlut	#110,x	'write level
    		add	x,#1
    		djnz	y,@blank3
    
    
    'Stream LUT dat to DAc's
    
    frame		mov	lines,##525
    
    loop		xcont	##$0c00_0001,#0		'Goertzel mode, output sin/cos on dacs 1/0
    		setxfrq	##$001479a0 >>1	'300kHz with 50MHz system clock
    
    ''prepare video line here while streamer does it's thingg...
    
    	'	waitx	##3150
    
    		djnz	lines,@loop
    	
    		jmp	@frame
    
    
    		org				'make some variable space starting at 32 (register $008)
    
    lines		res	1
    x		res	1
    y		res	1
    z		res	1
    
    phase		res	1
    
    
    
  • I can't come out to play for a few more days.... good times ahead guys. (Looks at code with interest...)

  • TubularTubular Posts: 4,705
    edited 2015-10-06 04:11
    and here's the video signal on the scope, without 75 ohm termination (voltages are doubled).

    We just gave it an extra wide front and back porch, and h sync signal, enough to get it on the monitor.

    Note the 4k Ifs resistor on the dac may need to change to allow a large enough range for ntsc/pal

    Didn't take a screen shot at the time, idiotically... sorry. Soon
    494 x 362 - 108K
  • Cheers Tubular, I'll have a play tonight :D
  • RaymanRayman Posts: 14,762
    Anybody know why this is called "Goertzel" mode?

    Wikipedia says you can do an inverse Goertzel to make a sine wave.
    But, this doesn't appear to be what's going on here...
    This looks like just outputting from LUT to DACs in a loop...
  • rjo__rjo__ Posts: 2,114
    About the general topic of VGA, I think we have a .qsf file for the A7 only. And it does not detail a pin for either hsync or vsync. In the documentation pdf with the layouts, it lists two of the experimental pins as sources for hsync and vsync for each connector, but without knowing how this is hooked up(or most likely not hooked up yet) to the P2, we need to be patient... I think:)

    Even if we only have 256kB on the de2 and not enough room for a full 640x480 at 8 bits, we only need to populate part of the screen to prove that it is working. Remember, the A9 will have a full 1MB in hub!!!:)!!!
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