Hmm, Chip has included incrementing versions of these instructions also. Incrementing versions don't make much sense to me, given the conditional branch is only triggered when D is reaching/crossing zero.
The incrementing set could be repurposed for extended immediate negative range ...
EDIT: Or at least a more selective set, eg: Keep DJZ, DJNZ, IJS, IJNS and reuse DJS, DJNS, IJZ, IJNZ for the extended immediate versions of DJZ, DJNZ, IJS, IJNS.
Memory is a bit "foggu" today.
I seem to recall a CALLD bug too, can't remember if that was fixed either.
I will have to check my notes (if I can find them! )
There's something I don't understand with SETQ2 and LUT filling...
I'm trying to write to zero based LUT location stored in "i"
Doesn't work directly, but have to use "setd" to put it in...
What's going on?:
setd LutFill,i 'have to do this, or it doesn't work...
nop
setq2 #32-1
LutFill rdlong i,pset
Ah, the RDLONG D field is always a starting register. It's used as an immediate, in a sense. Just think how plain old RDLONG works. With SETQ/SETQ2, that D register is no longer the sole recipient, but the first recipient of string of longs that get written to subsequent registers.
Chip
All V16 images flashed and Id Ok in Pnut V16
Only issue so far is De2-115 image, buttons not responding
Thanks for doing that!!!
I just looked and the three pushbutton switches are mapped to P31..P29. I wonder what the problem is.
Buttons on DE2-115 are OK.
My code scans for available smart pins and if count was 8 fpga board is de2 else p123-a7/a9.
DE2-115 fpga image now has 6 smart pins. All working now.
Chip
All V16 images flashed and Id Ok in Pnut V16
Only issue so far is De2-115 image, buttons not responding
Thanks for doing that!!!
I just looked and the three pushbutton switches are mapped to P31..P29. I wonder what the problem is.
Buttons on DE2-115 are OK.
My code scans for available smart pins and if count was 8 fpga board is de2 else p123-a7/a9.
DE2-115 fpga image now has 6 smart pins. All working now.
Ok. Whew! Thanks for finding out. I can sleep now.
Chip: What do you do with the ALTx and AUGx instructions now in PNut? Do you generate them automatically based on the size of constants and such? Actually, I guess the ALTx instructions can't be done that way. Have you invented new PASM instructions that make use of the ALTx prefix?
Chip: What do you do with the ALTx and AUGx instructions now in PNut? Do you generate them automatically based on the size of constants and such? Actually, I guess the ALTx instructions can't be done that way. Have you invented new PASM instructions that make use of the ALTx prefix?
You have to manually use ## instead of # if you want a big constant. ## will invoke AUGS/AUGD.
I haven't made compound instructions, yet. They would be really useful for the nibble/byte/word access in cog registers.
Comments
The incrementing set could be repurposed for extended immediate negative range ...
EDIT: Or at least a more selective set, eg: Keep DJZ, DJNZ, IJS, IJNS and reuse DJS, DJNS, IJZ, IJNZ for the extended immediate versions of DJZ, DJNZ, IJS, IJNS.
I'm trying to figure this out:
Oh, I see... I'll try that.
Thought it'd be , but PNut didn't like that...
Good idea to use compile time filling.
You can also use ##address.
I have found that ## doesn't work for DJNZ Compiles with no "out of range error" but crashes code.
I think there may be an old assembler bug that you pointed out, which I haven't fixed yet. Remember that?
I seem to recall a CALLD bug too, can't remember if that was fixed either.
I will have to check my notes (if I can find them!
This variant of CALLD has the same issue as DJNZ when using ##.
CCCC 1011001 CZI DDDDDDDDD SSSSSSSSS CALLD D,S/#rel9 {WC,WZ}Ok. Thanks.
I'm trying to write to zero based LUT location stored in "i"
Doesn't work directly, but have to use "setd" to put it in...
What's going on?:
setd LutFill,i 'have to do this, or it doesn't work... nop setq2 #32-1 LutFill rdlong i,psetWeird, I'm getting the same here.
Ah, the RDLONG D field is always a starting register. It's used as an immediate, in a sense. Just think how plain old RDLONG works. With SETQ/SETQ2, that D register is no longer the sole recipient, but the first recipient of string of longs that get written to subsequent registers.
Why doesn't setq2/rdlong work as written without the setd?
The rdlong is specified with "i" as destination.
Why doesn't that work?
Why does using setd with the same "i" work and not without it?
Ok, maybe I see it now...
In one case it's using contents of i register and in other it's using the location of the i register, right?
I guess to use setq2 in a normal way, one would have to use a second org to start at LUT starting point and then create a label there...
All V16 images flashed and Id Ok in Pnut V16
Only issue so far is De2-115 image, buttons not responding
Thanks for doing that!!!
I just looked and the three pushbutton switches are mapped to P31..P29. I wonder what the problem is.
My code scans for available smart pins and if count was 8 fpga board is de2 else p123-a7/a9.
DE2-115 fpga image now has 6 smart pins. All working now.
Ok. Whew! Thanks for finding out. I can sleep now.
You have to manually use ## instead of # if you want a big constant. ## will invoke AUGS/AUGD.
I haven't made compound instructions, yet. They would be really useful for the nibble/byte/word access in cog registers.
For the shift instructions like RCL, could you use the wz to have the option of shifting C (before it gets updated) instead of zero?
No comprende. RCL does shift C in before it gets updated. SHL shifts 0 in.
I guess I haven't figured out how to decipher the spreadsheet...
but, of course, rcl should rotate in C
Sorry. I kind of used Verilog syntax to express what's going on. It's a lot shorter than words.