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Prop2 FPGA files!!! - Updated 2 June 2018 - Final Version 32i - Page 74 — Parallax Forums

Prop2 FPGA files!!! - Updated 2 June 2018 - Final Version 32i

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  • evanhevanh Posts: 11,042
    edited 2017-02-19 00:11
    Hmm, Chip has included incrementing versions of these instructions also. Incrementing versions don't make much sense to me, given the conditional branch is only triggered when D is reaching/crossing zero.

    The incrementing set could be repurposed for extended immediate negative range ...


    EDIT: Or at least a more selective set, eg: Keep DJZ, DJNZ, IJS, IJNS and reuse DJS, DJNS, IJZ, IJNZ for the extended immediate versions of DJZ, DJNZ, IJS, IJNS.
  • RaymanRayman Posts: 12,025
    edited 2017-02-19 00:29
    Ok, I get it now. Doesn't say this in Chip's spreadsheet, but does in the old docs.

    I'm trying to figure this out:
    evanh wrote: »
    It adds extra clutter to the code but using another register to store the branch address is available at no speed penalty.

    Oh, I see... I'll try that.
  • RaymanRayman Posts: 12,025
    edited 2017-02-19 00:34
    Got it. Was strange to me, but this worked:
    djnz    x,LineLoopStart'#line
    
    ...
    
    LineLoopStart long      Line
    

    Thought it'd be
    LineLoopStart long      #Line
    
    , but PNut didn't like that...
  • evanhevanh Posts: 11,042
    Hehe, it's as terse as possible but it's there in assembly syntax column of the Prop2 spreadsheet too.
  • evanhevanh Posts: 11,042
    Rayman wrote: »
    Got it. Was strange to me, but this worked:
    djnz    x,LineLoopStart'#line
    
    ...
    
    LineLoopStart long      Line
    

    Thought it'd be
    LineLoopStart long      #Line
    
    , but PNut didn't like that...

    Good idea to use compile time filling.
  • cgraceycgracey Posts: 13,610
    evanh wrote: »
    It adds extra clutter to the code but using another register to store the branch address is available at no speed penalty.

    You can also use ##address.
  • evanhevanh Posts: 11,042
    cgracey wrote: »
    You can also use ##address.
    Crap, a 20bit address for register map! You've soiled it!
  • Chip
    I have found that ## doesn't work for DJNZ
    dat	org
    
    loop	getct	pa
    	testb	pa,#25 wc
    	drvc	#32
    
    	orgf	$100
    	djnz	pa,##loop
    
    Compiles with no "out of range error" but crashes code.
  • cgraceycgracey Posts: 13,610
    ozpropdev wrote: »
    Chip
    I have fund that ## doesn't work for DJNZ
    dat	org
    
    loop	getct	pa
    	testb	pa,#25 wc
    	drvc	#32
    
    	orgf	$100
    	djnz	pa,##loop
    
    Compiles with no "out of range error" but crashes code.

    I think there may be an old assembler bug that you pointed out, which I haven't fixed yet. Remember that?
  • Memory is a bit "foggu" today.
    I seem to recall a CALLD bug too, can't remember if that was fixed either.
    I will have to check my notes (if I can find them! :))
  • Chip
    This variant of CALLD has the same issue as DJNZ when using ##.
    CCCC 1011001 CZI DDDDDDDDD SSSSSSSSS        CALLD   D,S/#rel9   {WC,WZ}
    
  • cgraceycgracey Posts: 13,610
    ozpropdev wrote: »
    Chip
    This variant of CALLD has the same issue as DJNZ when using ##.
    CCCC 1011001 CZI DDDDDDDDD SSSSSSSSS        CALLD   D,S/#rel9   {WC,WZ}
    

    Ok. Thanks.
  • RaymanRayman Posts: 12,025
    edited 2017-02-20 22:32
    There's something I don't understand with SETQ2 and LUT filling...

    I'm trying to write to zero based LUT location stored in "i"
    Doesn't work directly, but have to use "setd" to put it in...
    What's going on?:
                    setd    LutFill,i  'have to do this, or it doesn't work...
                    nop
                    setq2   #32-1
    LutFill         rdlong  i,pset
    
  • ozpropdevozpropdev Posts: 2,763
    edited 2017-02-20 23:11
    setd requires two spacer instructions.
    Weird, I'm getting the same here.

  • cgraceycgracey Posts: 13,610
    Rayman wrote: »
    There's something I don't understand with SETQ2 and LUT filling...

    I'm trying to write to zero based LUT location stored in "i"
    Doesn't work directly, but have to use "setd" to put it in...
    What's going on?:
                    setd    LutFill,i  'have to do this, or it doesn't work...
                    nop
                    setq2   #32-1
    LutFill         rdlong  i,pset
    


    Ah, the RDLONG D field is always a starting register. It's used as an immediate, in a sense. Just think how plain old RDLONG works. With SETQ/SETQ2, that D register is no longer the sole recipient, but the first recipient of string of longs that get written to subsequent registers.
  • RaymanRayman Posts: 12,025
    I guess I'm wondering if there's a way to do it without the "setd"...

    Why doesn't setq2/rdlong work as written without the setd?
  • Rayman wrote: »
    I guess I'm wondering if there's a way to do it without the "setd"...

    Why doesn't setq2/rdlong work as written without the setd?
    I think that would require two cog ram reads which is not possible in 2 clocks.
  • RaymanRayman Posts: 12,025
    edited 2017-02-21 01:14
    I guess I'm confused...
    The rdlong is specified with "i" as destination.
    Why doesn't that work?

    Why does using setd with the same "i" work and not without it?

    Ok, maybe I see it now...
    In one case it's using contents of i register and in other it's using the location of the i register, right?

    I guess to use setq2 in a normal way, one would have to use a second org to start at LUT starting point and then create a label there...
  • Chip
    All V16 images flashed and Id Ok in Pnut V16
    Only issue so far is De2-115 image, buttons not responding
  • cgraceycgracey Posts: 13,610
    ozpropdev wrote: »
    Chip
    All V16 images flashed and Id Ok in Pnut V16
    Only issue so far is De2-115 image, buttons not responding

    Thanks for doing that!!!

    I just looked and the three pushbutton switches are mapped to P31..P29. I wonder what the problem is.
  • cgraceycgracey Posts: 13,610
    So, new v16 at the top of this thread.
  • cgracey wrote: »
    ozpropdev wrote: »
    Chip
    All V16 images flashed and Id Ok in Pnut V16
    Only issue so far is De2-115 image, buttons not responding

    Thanks for doing that!!!

    I just looked and the three pushbutton switches are mapped to P31..P29. I wonder what the problem is.
    Buttons on DE2-115 are OK.
    My code scans for available smart pins and if count was 8 fpga board is de2 else p123-a7/a9.
    DE2-115 fpga image now has 6 smart pins. All working now. :)

  • cgraceycgracey Posts: 13,610
    ozpropdev wrote: »
    cgracey wrote: »
    ozpropdev wrote: »
    Chip
    All V16 images flashed and Id Ok in Pnut V16
    Only issue so far is De2-115 image, buttons not responding

    Thanks for doing that!!!

    I just looked and the three pushbutton switches are mapped to P31..P29. I wonder what the problem is.
    Buttons on DE2-115 are OK.
    My code scans for available smart pins and if count was 8 fpga board is de2 else p123-a7/a9.
    DE2-115 fpga image now has 6 smart pins. All working now. :)

    Ok. Whew! Thanks for finding out. I can sleep now.
  • cgraceycgracey Posts: 13,610
    I got all the alias instructions added into the spreadsheet. To separate them from the main instructions, just do a 'Sort A-Z' on the "Alias" column.
  • Chip: What do you do with the ALTx and AUGx instructions now in PNut? Do you generate them automatically based on the size of constants and such? Actually, I guess the ALTx instructions can't be done that way. Have you invented new PASM instructions that make use of the ALTx prefix?
  • cgraceycgracey Posts: 13,610
    David Betz wrote: »
    Chip: What do you do with the ALTx and AUGx instructions now in PNut? Do you generate them automatically based on the size of constants and such? Actually, I guess the ALTx instructions can't be done that way. Have you invented new PASM instructions that make use of the ALTx prefix?

    You have to manually use ## instead of # if you want a big constant. ## will invoke AUGS/AUGD.

    I haven't made compound instructions, yet. They would be really useful for the nibble/byte/word access in cog registers.
  • RaymanRayman Posts: 12,025
    edited 2017-02-25 20:36
    Was just wondering something (don't shoot me!).

    For the shift instructions like RCL, could you use the wz to have the option of shifting C (before it gets updated) instead of zero?
  • cgraceycgracey Posts: 13,610
    Rayman wrote: »
    Was just wondering something (don't shoot me!).

    For the shift instructions like RCL, could you use the wz to have the option of shifting C (before it gets updated) instead of zero?

    No comprende. RCL does shift C in before it gets updated. SHL shifts 0 in.
  • RaymanRayman Posts: 12,025
    edited 2017-02-25 23:21
    Sorry, that was a dumb question.
    I guess I haven't figured out how to decipher the spreadsheet...
    but, of course, rcl should rotate in C
  • cgraceycgracey Posts: 13,610
    Rayman wrote: »
    Sorry, that was a dumb question.
    I guess I haven't figured out how to decipher the spreadsheet...
    but, of course, rcl should rotate in C

    Sorry. I kind of used Verilog syntax to express what's going on. It's a lot shorter than words.
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