eASIC for P3 ???
Cluso99
Posts: 18,069
in Propeller 2
An article for 28nm ASIC for FPGA replacement, NRE $400K including samples.
http://www.eejournal.com/archives/articles/20150901-easic/
~1.8M LUTs, 56Mb BlockRam and some eFuse storagefor keys.
Probably no ADC.
Imagine what Chip could do with this!!!
Perhaps the older 90nm may be cheaper and smaller.
http://www.eejournal.com/archives/articles/20150901-easic/
~1.8M LUTs, 56Mb BlockRam and some eFuse storagefor keys.
Probably no ADC.
Imagine what Chip could do with this!!!
Perhaps the older 90nm may be cheaper and smaller.
Comments
IIRC, Chip said 90nm would cost something like $120k, but I don't think that includes services like synthesis, place and route, and whatever else a company like Treehouse does.
By the time P3 comes around 2-3 years from now, I expect 90-65nm will be a distinct possibility.
At some point, it would seem to almost become more cost prohibitive to continue running these really old processes when you can upgrade with someone else's old equipment they've set aside, and get 200-300% more parts for the same amount of silicon.
Don't you mean 90nm at most ;-)
Of course. May have improved logic blocks and such but what else could it be if one only needs to add the interconnect layer? Recycling an old idea using new technology can often produce great results.
Sorry Mark, I made a valiant effort but just could not resist.