LVDS

pilot0315

Has anybody worked with LVDS protocol for a tft lcd or have any example code for this protocol.
Thanks

kwinn

pilot0315 wrote: »

Has anybody worked with LVDS protocol for a tft lcd or have any example code for this protocol.
Thanks

LVDS is a hardware signalling standard that supports several protocols. (See https://en.wikipedia.org/wiki/Low-voltage_differential_signaling). Code would be specific to the application. Posting some more details of what you are trying to do may get you more help.

LoopyByteloose

LVDS is something that the FPGA devices seem to support exploring. Both my BeMicroCV ($50USD) and BeMicroCVA9 ($150) can support it. Code is likely in Verilog or VHDL for the basic support. Maybe in C for actual graphics.

You can load a Propeller 1V image on these devices. And there are video interfaces from tiny touch screens all the way to HDMI.

Ale

This may give you an idea of what it takes to interface to a LVDS-enabled panel. There is a new standard (they crop up like flies it seems) called MPI-DSI, available in the STM32F469/479, for example .

Of course you may have read this wikipedia entry, provided links are also quite nice

LoopyByteloose

My newly purchased BeMicroCV and CVA9 seem to both intentionally support LVDS interfacing. The 80 pins of interface are setup with LVDS Rx and Tx pairs. There are development packages for the CV that include a touchscreen video display that uses the LVDS interface and I presume some code is available to get started with the provided device. (cost is about $400USD).

I personally do not desire to spend that much to get started with video (and touchscreen)

The LVDS scheme is intended to eliminate noise that arises in parallel ribbon cables by using differential transmitters and receivers. Laptops and hand-held devices with video screens seem to be the main use of this. I can't find anything else.

It looks like I have 9 pairs of Tx and Rx LVDS physically designated (I may be wrong). That would seem to indicate an 9 bit high speed parallel connection (1 byte wide and perhaps a parity bit).

+++++++++
Using the P1v FPGA code seems the most painless way to actually wire up a video device to Propeller of any sorts. It also creates an opportunity to generate faster clocking speeds than the normal off-the-shelf Propeller1.

But expecting someone to provide ready-to-use code may not be realistic.

ksltd

LVDS is an acronym for Low Voltage Differential Swing. It is an electrical signaling technique used for ver high speed communication. It is the basis of many, many modern protocols but it is not a protocol in any sense of the word.

USB 3, HDMI, XAUI, PCI-Express and many other protocols are built using lVDS signaling.

From your question, it seems you're asking about HDMI - but your description of an LCD Panel really doesn't mean much. Is that an LCD panel in a calculator, a touch screen or a high def monitor?

LoopyByteloose

Yes, the original poster just asked a question that was a bit vague and wandered away.

The actual wiring is quite similar to what RS-422 and RS-485 desire to do. But the gains seem to be more in speed than in long-distances.

There are some LCD touch screens and laptop computer screens that directly use LVDS from their motherboards, not a conversion to HDMI.

ksltd

The difference between 422/485, which share the same electrical definition, and LVDS is the LV.

LVDS swings are Low Voltage - and the slew rates of the big swings are one considerable performance limiter. An LVDS swing is about 350mV, where as 422/485 has a 2.0V swing. That difference is about 6x.

Remember, if we want to shift a gigabit per second, that's a nanosecond per bit. If we allocate, say, 10% of the nanosecond for rise-and-fall time, then that's 2 volts in just 100 picoseconds or 20 billion volts per second - significantly more than the slew rate of a lightning bolt. Managing overshoot due to slight impedance mismatches becomes impossible as does noise coupling.

The other big change is that unlike 422/485 signaling, which depends on separate clocks in the transmitter and receiver being relatively close in accuracy, LVDS signals are self-clocking. That is, the clock at the receiver is reconstructed from the received data, which eliminates any source-destination clock issues that inherently limit the clock speed of 422/485 performance.