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Driving a LCD/TFT directly including pixel clock — Parallax Forums

Driving a LCD/TFT directly including pixel clock

There are a lot of video drivers but all generate only video and sync signals.
I'd like to directly connect some standard TFT. This would also need a pixel clock signal.
Any chance to create it?
The waitvid instruction is not useful here since loading the video generator happens a "frame" frequencies.
The signal from counter A can also not be output to a pin.
Would it be possible to use counter B and do some kind of external synchronization?

Thanks for any hints
Reinhardt


Comments

  • kwinnkwinn Posts: 8,697
    I think that may be possible by modifying one of the video drivers so that the horizontal and vertical sync signals gate an output clock signal from a counter. External gating would certainly work, and internal gating may be possible by taking advantage of the "or"ing of outputs to the pins. If a positive horizontal and vertical sync and the clock signal were all going to the same pin it would only be low when all three signals were low, resulting in a clock signal output during non sync periods.

    Can you post specs for the LCD panel you are using?
  • There is no need for gating of the clock. The usual TFTs take a continuous pixel clock signal. Many current ones have only a LVDS interface. For this you will need a continuous clock.

    My concern was how to get the internal pixel clock to an output pin. But kuroneko pointed my in the right direction. It should be possible to run counter A in mode 2 instead of 1. This way I can route the output of the PLL to a pin.

    I will post the results of my investigation.
    An example of a display is
    http://www.display-solution.com/pdf/tft-displays/Chi Mei Innolux/G057VGE-T01_20130809.pdf
    But most TFTs have the same interface specs.

    Reinhardt

  • RaymanRayman Posts: 14,651
    I've been doing this for years...You can find drivers on my website for 3.5" and 4.3" TFTs using Prop video with pixel clock....
  • kwinnkwinn Posts: 8,697
    There is no need for gating of the clock. The usual TFTs take a continuous pixel clock signal. Many current ones have only a LVDS interface. For this you will need a continuous clock.........


    Reinhardt



    Thanks for the info. I used an old laptop screen a few years back and wondered why it had both the sync signals and a pixel clock connected, and if it was really necessary. Had a project with a deadline to complete so I built the interface with both and never got back to see if it really needed all of them.

  • kwinn wrote:

    Thanks for the info. I used an old laptop screen a few years back and wondered why it had both the sync signals and a pixel clock connected, and if it was really necessary. Had a project with a deadline to complete so I built the interface with both and never got back to see if it really needed all of them.


    Most TFT need pixel clock and hsync, vsynch. Some even have a DE signal which is active when valid pixel data is sent.

    In the mean time I have tested the changes kuroneko proposed (running counter A in mode 2 instead of 1). This way you can output the PLL clock to a pin.
    Since the usual drivers work with a scale of 1 in VSCL the PLL clock is also the pixel clock and t can be used for the TFT.
    Currently I'm playing with the idea to generate the synch signal pure with software to free 2 bits from the vid gen and create some more colors (using 3-3-2 bits for R-G-B, instead of 2-2-2).

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