Parallel Programmer Considerations

Kye

I'm using a prop chip rig to load firmware for 5 ARM devices in parallel using the SWD protocol. The prop chip will be on a test rig that can program 5 boards at out of a panel of 20. The operator will position the rig above 5 boards, program them, and then move to the next 5.

Does anyone have experience designing firmware loaders for production? What types of things should I consider beyond just loading the firmware. Like, power issues, shorts, connectivity, etc.

Any thoughts would be appreciated.

evanh

Antistatic is a biggie, eliminate those differentials.

I presume your rig is providing power to the target boards during the firmware loading, five plugs? Power control would allow for automatic post-programming power cycle testing. Hot plugging connector design could be warranted. Wear and tear will need to be addressed, spare leads usually solves this.

Current limiting via resistors is easy on the data lines but requires more work for power supply. Power up voltage measuring of all pins could help with fault reporting. Zenor diode clamping of all lines.

Kye

Thank you evanh,

KeithE

I was not directly involved in this, but I'll tell you one weird thing I heard about with a production board tester which may have included some flash programming. (I can't recall.) The normal power supply (wall wart) was bypassed and the manufacturing rig supplied the board power. The current in-rush calculations were done assuming that the maximum of boards were always loaded. So if say only a single board were loaded, then the in-rush current would be higher than expected. This could damage tantalum capacitors such that they were likely to smoke much later and potentially at a customer site. Anyways that's what I heard...

Search for smoke here - http://yro.slashdot.org/story/01/07/08/1425206/telocity-wants-its-gateways-back

kwinn

A simple, reliable way of connecting to the boards to prevent reversed/incorrect connections and soft power up. Individual linear regulators for each board so the voltage rise time and inrush current is individually controlled for each board if possible.

Kye

Each board only draws about 30 mA. I don't think inrush current will be an issue. But, thanks for the tip.

KeithE

Sorry if this is redundant, but if you use any tantalum capacitors then you need to make sure that you don't exceed their peak current rating. If you have a supply which can supply 5 boards, then you need to make sure that it isn't going to exceed the peak current rating even if the full load isn't present. Maybe you're covered (e.g. the supplies are separate as kwinn suggested), but if these capacitors are damaged you may not know for quite some time and it's ugly when they fail. Anyways someone should have done the in-rush calculations for each individual board, so you can check over their notes to see if their are any particularly sensitive parts.

I assume that 30 mA is the steady state current draw once all of the bypass capacitors are fully charged? Not the measured maximum in-rush current?

Kye

It looks like the current draw will be more like 150 mA. But, each board has an MCU... so, the current draw goes up as the MCU boots up, etc.

I've passed the board design off to a professional.

Thanks for your help,